Difference between revisions of "DSP Memory Region"

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*Note that everything below will vary depending on the exact DSP firmware used and different variants have slightly different behaviours.*
  
The DSP communicates with userland through memory locations 0x1ff40000-0x1ff77fff. Within this region are two areas of structures that are exact duplicates of each other. The DSP alternates between the use of these two areas (much like a double-buffer). Each area has 15 structures within it. The location of these structures can be obtained by [[DSP:ReadPipe|reading channel 2 of the DSP pipe]].
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The DSP communicates with the application through two shared memory areas 0x8000 bytes long each (at 0x1FF50000 and 0x1FF70000 respectively). The DSP alternates between the use of these two areas (much like a double-buffer). Each area has 15 structures within it. The location of these structures can be obtained by [[DSP:ReadPipe|reading channel 2 of the DSP pipe]]. A list of structures in the order the DSP addresses are read from the pipe follows:
  
The mixer has 24 channels, each of which are individually configurable.
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1. Frame count
 +
2. Input configurations
 +
3. Input status
 +
4. Input ADPCM coefficients
 +
5. DSP configuration
 +
6. DSP status
 +
7. Output samples
 +
8. Intermediate mix samples
 +
9. Unknown Coefficients
 +
10. DSP debug statistics
 +
11. Unknown Coefficients
 +
12. Unknown Coefficients
 +
13. Unknown Coefficients
 +
14. Unknown Coefficients
 +
15. Unknown Coefficients
  
{| class="wikitable"
+
The DSP has 24 inputs, each of which are individually configurable. These 24 inputs each produce three sets of 4 audio channels (two left, two right).
|-
+
 
| Structure Number
+
These four audio channels feed into three intermediate mixers. Two of these intermediate mixers are used for effects and aux.
| DSP memory address
 
| Size
 
| Description
 
|-
 
| 5
 
| 0x8400
 
| 0x20
 
| Status (?)
 
|-
 
| 9
 
| 0x8410
 
| 0x260
 
| Debug (?)
 
|-
 
| 6
 
| 0x8540
 
| 0x280
 
| Loopback Samples (PCM16)
 
|-
 
| 2
 
| 0x8680
 
| 0x120
 
| Channel Status (x24)
 
|-
 
| 8
 
| 0x9710
 
| 0x1A40
 
| ?
 
|-
 
| 4
 
| 0x9430
 
| 0xC4
 
| Main Configuration
 
|-
 
| 7
 
| 0x9492
 
| 0x1400
 
| ?
 
|-
 
| 1
 
| 0x9e92
 
| 0x1200
 
| Channel Config (x24)
 
|-
 
| 3
 
| 0x9430
 
| 0x300
 
| GC-ADPCM Coefficients (x24)
 
|-
 
| 10
 
| 0xa912
 
| 0x200
 
|
 
|-
 
| 11
 
| 0xaa12
 
| 0x180
 
|
 
|-
 
| 12
 
| 0xaad2
 
| 0x300
 
|
 
|-
 
| 13
 
| 0xac52
 
| 0x14
 
|
 
|-
 
| 14
 
| 0xac5c
 
| 0x2476
 
| -
 
|-
 
| 0
 
| 0xbfff
 
| 0x2
 
| Frame Counter
 
|}
 
  
 
== Channel Config ==
 
== Channel Config ==
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|}
 
|}
  
=== Dirty Bits ===
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=== Simple Filter Configuration ===
 +
 
 +
This is a standard single-pole filter. The fall-off is 6dB per octave as you would expect.
  
 
{| class="wikitable"
 
{| class="wikitable"
 
|-
 
|-
| Bit
+
| Offset
| What Changed
+
| Type
 +
| Description
 
|-
 
|-
| 3
+
| 0
| ADPCM Coefficients
+
| s16
 +
| b0
 
|-
 
|-
| 5
+
| 0
| Embedded buffer
+
| s16
|-
+
| a1
| 13
 
| Is Active
 
|-
 
| 18
 
| Interpolation Type
 
|-
 
| 19
 
| Rate
 
|-
 
| 20
 
| Buffer Queue
 
|-
 
| 22
 
| Embedded buffer
 
|-
 
| 23
 
| IRR Filter Type
 
|-
 
| 25
 
| Sync Count
 
|-
 
| 26-28
 
| Mix
 
|-
 
| 30
 
| First time init
 
|-
 
| 31
 
| Embedded Buffer
 
 
|}
 
|}

Revision as of 00:07, 17 February 2016

Some of this is known to be incorrect. I'll correct this in a few months after a bit more RE work. Merry (talk) 21:10, 28 January 2016 (CET)


  • Note that everything below will vary depending on the exact DSP firmware used and different variants have slightly different behaviours.*

The DSP communicates with the application through two shared memory areas 0x8000 bytes long each (at 0x1FF50000 and 0x1FF70000 respectively). The DSP alternates between the use of these two areas (much like a double-buffer). Each area has 15 structures within it. The location of these structures can be obtained by reading channel 2 of the DSP pipe. A list of structures in the order the DSP addresses are read from the pipe follows:

1. Frame count 2. Input configurations 3. Input status 4. Input ADPCM coefficients 5. DSP configuration 6. DSP status 7. Output samples 8. Intermediate mix samples 9. Unknown Coefficients 10. DSP debug statistics 11. Unknown Coefficients 12. Unknown Coefficients 13. Unknown Coefficients 14. Unknown Coefficients 15. Unknown Coefficients

The DSP has 24 inputs, each of which are individually configurable. These 24 inputs each produce three sets of 4 audio channels (two left, two right).

These four audio channels feed into three intermediate mixers. Two of these intermediate mixers are used for effects and aux.

Channel Config

A 192 byte long structure. There are 24 of them.

Offset Type Description
0 u32 Dirty flags
4 70 bytes TODO
74 u16 Bitmap of which buffers in queue are dirty
76 Buffer[4] Buffer queue
156 u32 -
160 u16 Is Active
162 u16 Sync Count
164 8 TODO
172 u32 Physical address of current buffer
176 u32 Number of samples in current buffer
180 u16 bits[0:1]: 1 = mono, 2 = stereo; bits[2:3]: buffer format
182 u16 ADPCM predictor
184 s16 ADPCM yn1
186 s16 ADPCM yn2
188 u16 bit[0]: Has ADPCM data?; bit[1]: Is looping?
190 u16 Buffer Id of this current buffer

Buffer

Offset Type Description
0 u32 Physical Address
4 u32 Sample Count
8 u16 ADPCM P/S
10 s16[2] ADPCM yn[1,2]
14 u8 Has ADPCM?
15 u8 Looping?
16 u16 Buffer Id
18 u16 -

Simple Filter Configuration

This is a standard single-pole filter. The fall-off is 6dB per octave as you would expect.

Offset Type Description
0 s16 b0
0 s16 a1