Difference between revisions of "CTRCARD Registers"
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Line 30: | Line 30: | ||
! BIT | ! BIT | ||
! DESCRIPTION | ! DESCRIPTION | ||
+ | |- | ||
+ | | 15-0 | ||
+ | | ? | ||
+ | |- | ||
+ | | 19-16 | ||
+ | | Transfer size (0=0 bytes, 1=4 bytes, 2=0x10 bytes, ...) | ||
+ | |- | ||
+ | | 23-20 | ||
+ | | ? | ||
+ | |- | ||
+ | | 26-24 | ||
+ | | Clock delay (0..5) | ||
+ | |- | ||
+ | | 27 | ||
+ | | ? | ||
|- | |- | ||
| 28 | | 28 |
Revision as of 22:40, 27 October 2012
Registers
NAME | PHYSICAL ADDRESS | WIDTH |
---|---|---|
REG_CTRCARDCNT | 0x10004000 | 4 |
REG_CTRCARDSECCNT | 0x10004008 | 4 |
REG_CTRCARDSECSEED | 0x10004010 | 4 |
REG_CTRCARDCMD | 0x10004020 | 16 |
REG_CTRCARDFIFO | 0x10004030 | 4 |
REG_CTRCARDCNT
BIT | DESCRIPTION |
---|---|
15-0 | ? |
19-16 | Transfer size (0=0 bytes, 1=4 bytes, 2=0x10 bytes, ...) |
23-20 | ? |
26-24 | Clock delay (0..5) |
27 | ? |
28 | Reset (Read-only 1=High, 0=Low) |
29 | Transfer mode (1=Write, 0=Read) |
30 | Interrupt enable (1=Enable, 0=Disable) |
31 | Start (1=Busy, 0=Idle) |
REG_CTRCARDCMD
Specifies the 16-byte command to send. The command is split into 32-bit words, and stored as least significant word first, with each word itself in big-endian format.