Virtual address mapping TWLFIRM04: Difference between revisions
Created page with "The same translation table base is used for both ARM11 cores, and for both privileged-mode and user-mode. =ARM11 Privileged Memory= VA 3FFFB000..3FFFC000 -> PA 1FF84000..1FF840..." |
Clarify (without template, because there's only one TWL_FIRM described currently) |
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This page describes the virtual address mapping set up by [[FIRM#TWL_FIRM_and_AGB_FIRM|TWL_FIRM]] 04. | |||
The same translation table base is used for both ARM11 cores, and for both privileged-mode and user-mode. | The same translation table base is used for both ARM11 cores, and for both privileged-mode and user-mode. | ||
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VA FFFF7000..FFFF8000 -> PA 1FF86000..1FF87000 [SYS:RW USR:-- XN TYP:NORMAL SHARED OUTER NOCACHE, INNER CACHED WB WA] | VA FFFF7000..FFFF8000 -> PA 1FF86000..1FF87000 [SYS:RW USR:-- XN TYP:NORMAL SHARED OUTER NOCACHE, INNER CACHED WB WA] | ||
VA FFFF9000..FFFFA000 -> PA 1FF85000..1FF86000 [SYS:RW USR:-- XN TYP:NORMAL SHARED OUTER NOCACHE, INNER CACHED WB WA] | VA FFFF9000..FFFFA000 -> PA 1FF85000..1FF86000 [SYS:RW USR:-- XN TYP:NORMAL SHARED OUTER NOCACHE, INNER CACHED WB WA] | ||