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Line 98:
Line 98: − + Line 104:
Line 104: − + Line 110:
Line 110: − + Line 265:
Line 265: − + − Set to 0x8001 when running under TWL_FIRM, 0 NATIVE_FIRM.+ + + +
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|-style="border-top: double"
|-style="border-top: double"
| style="background: green" | Yes
| style="background: green" | Yes
| [[#PDN_TWLMODE|PDN_TWLMODE]]
| [[#PDN_TWLMODE_0|PDN_TWLMODE_0]]
| 0x10141100
| 0x10141100
| 2
| 2
|-
|-
| style="background: green" | Yes
| style="background: green" | Yes
| TwlMode related?
| [[#PDN_TWLMODE_1|PDN_TWLMODE_1]]
| 0x10141104
| 0x10141104
| 2
| 2
|-
|-
| style="background: green" | Yes
| style="background: green" | Yes
| ?
| [[#PDN_TWLMODE_2|PDN_TWLMODE_2]]
| 0x10141108
| 0x10141108
| 2
| 2
Bit0: Enable wifi.
Bit0: Enable wifi.
==PDN_TWLMODE==
==PDN_TWLMODE_0==
Observed 0x8001 when running under TWL_FIRM, 0 NATIVE_FIRM.
The very last 3DS-mode register poke the [[FIRM|TWL_FIRM]] Process9 does before it gets switched into TWL-mode, is writing 0x8000 to this register. Before writing this register, TWL Process9 waits for the value of this register to become non-zero. The Process9 code for this runs from ITCM, since switching into TWL-mode includes remapping all ARM9 physical memory.
The very last 3DS-mode register poke the [[FIRM|TWL_FIRM]] Process9 does before it gets switched into TWL-mode, is writing 0x8000 to this register. Before writing this register, TWL Process9 waits for the value of this register to become non-zero. The Process9 code for this runs from ITCM, since switching into TWL-mode includes remapping all ARM9 physical memory.
Writing 0x8000 to here from the ARM9 with NATIVE_FIRM running doesn't seem to do anything, other reg-pokes likely need done first.
Writing 0x8000 to here from the ARM9 with NATIVE_FIRM running doesn't seem to do anything, other reg-pokes likely need done first.
==PDN_TWLMODE_1==
Observed 0x8000 when running under TWL_FIRM, 0 NATIVE_FIRM.
==PDN_GPU_CNT==
==PDN_GPU_CNT==