SPI Registers: Difference between revisions
m Correct SPI_NEW_STATUS |
Update SPI_NEW_DONE |
||
Line 26: | Line 26: | ||
|- | |- | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
| | | [[#SPI_NEW_DONE|SPI_NEW_DONE]]0 | ||
| 0x10142804 | | 0x10142804 | ||
| 4 | | 4 | ||
Line 68: | Line 68: | ||
|- | |- | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
| | | [[#SPI_NEW_DONE|SPI_NEW_DONE]]1 | ||
| 0x10143804 | | 0x10143804 | ||
| 4 | | 4 | ||
Line 110: | Line 110: | ||
|- | |- | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
| | | [[#SPI_NEW_DONE|SPI_NEW_DONE]]2 | ||
| 0x10160804 | | 0x10160804 | ||
| 4 | | 4 | ||
Line 185: | Line 185: | ||
| Busy/enable | | Busy/enable | ||
|} | |} | ||
== SPI_NEW_DONE == | |||
When the transfer is finished, a 0 is written to this register. | |||
==SPI_NEW_BLKLEN== | ==SPI_NEW_BLKLEN== |