ARM11 Interrupts: Difference between revisions
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| Line 14: | Line 14: | ||
| 0-0x3 | | 0-0x3 | ||
| | | | ||
| MPCore software-interrupt. | | MPCore software-interrupt. Not configured. | ||
|- | |- | ||
| 0x4 | | 0x4 | ||
| Kernel | | Kernel | ||
| MPCore software-interrupt. | | MPCore software-interrupt. Used to manage the performance counter. | ||
|- | |- | ||
| 0x5 | | 0x5 | ||
| Line 30: | Line 30: | ||
| 0x7 | | 0x7 | ||
| Kernel | | Kernel | ||
| MPCore software-interrupt. | | MPCore software-interrupt. Used by, e.g., [[SVC|FlushProcessDataCache]]. | ||
|- | |- | ||
| 0x8 | | 0x8 | ||
| Line 38: | Line 38: | ||
| 0x9 | | 0x9 | ||
| Kernel | | Kernel | ||
| MPCore software-interrupt | | MPCore software-interrupt. | ||
|- | |- | ||
| 0xA | | 0xA | ||
| Line 46: | Line 46: | ||
| 0xB-0xE | | 0xB-0xE | ||
| | | | ||
| MPCore software-interrupt. | | MPCore software-interrupt. Not configured. | ||
|- | |- | ||
| 0xF | | 0xF | ||