PXI Registers: Difference between revisions

No edit summary
No edit summary
 
(16 intermediate revisions by 4 users not shown)
Line 11: Line 11:
| 0x10008000
| 0x10008000
| 4
| 4
|
| Boot9, Process9
|-
|-
| style="background: green" | Yes
| style="background: green" | Yes
| [[#PXI_CNT|PXI_CNT]]9
| [[#PXI_CNT|PXI_CNT]]9
| 0x10008004
| 0x10008004
| 2
| Boot9, Process9
|-
| style="background: green" | Yes
| PXI_SEND9
| 0x10008008
| 4
| 4
|
|
|-
|-
| style="background: green" | Yes
| style="background: green" | Yes
| PXI_RECV_FIFO9
| PXI_RECV9
| 0x10008008
| 0x1000800C
| 4
| 4
|
|
Line 29: Line 35:
| 0x10163000
| 0x10163000
| 4
| 4
|
| Boot11
|-
|-
| style="background: green" | Yes
| style="background: green" | Yes
| [[#PXI_CNT|PXI_CNT]]11
| [[#PXI_CNT|PXI_CNT]]11
| 0x10163004
| 0x10163004
| 4
| 2
|
| Boot11
|-
|-
| style="background: green" | Yes
| style="background: green" | Yes
Line 44: Line 50:
|-
|-
| style="background: green" | Yes
| style="background: green" | Yes
| PXI_RECV_11
| PXI_RECV11
| 0x1016300C
| 0x1016300C
| 4
| 4
Line 58: Line 64:
!  Description
!  Description
|-
|-
| 0-3
| 0-7
| R
| R
| Data input from PXI_SYNC Bit8-11 of remote CPU (00h..0Fh)
| Data received from remote bits 8-15 (unrelated to SEND/RECV FIFOs)
|-
|-
| 8-11
| 8-15
| R/W
| R/W
| Data output to PXI_SYNC Bit0-3 of remote CPU  (00h..0Fh)
| Data sent to remote bits 0-7
|-
| 23
| ?
| ?
|-
| 29
| W?
| Trigger PXI_SYNC11 IRQ (if enabled)
|-
|-
| 13
| 30
| W  
| W?
| Send IRQ to remote CPU      (0=None, 1=Send IRQ)
| Trigger PXI_SYNC9 IRQ (if enabled)
|-
|-
| 14
| 31
| R/W
| RW
| Enable IRQ from remote CPU  (0=Disable, 1=Enable)
| PXI_SYNC IRQ enable (for local processor)
|}
|}
This can also be accessed as 4 u8 registers.


== PXI_CNT ==
== PXI_CNT ==