TIMER Registers: Difference between revisions
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Kernel9 treats F/64 as (ARM 9 clockrate)/128 |
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There are 4 timers. | There are 4 timers. These timers run at a frequency of 67,027,964.0 ± 2<sup>-32</sup> Hz (i.e. exactly half the ARM9 clock frequency). | ||
= Registers = | = Registers = | ||
Line 13: | Line 13: | ||
| 0x10003000 + 4*n | | 0x10003000 + 4*n | ||
| 2 | | 2 | ||
| | | Boot9, Kernel9 | ||
|- | |- | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
Line 19: | Line 19: | ||
| 0x10003002 + 4*n | | 0x10003002 + 4*n | ||
| 2 | | 2 | ||
| | | Boot9, Kernel9 | ||
|} | |} | ||
== TIMER_VAL == | == TIMER_VAL == | ||
Writing to | Writing to TIMER_VAL loads a starting value for one of the 4 timers, while reading it will show the current timer value. | ||
== TIMER_CNT == | == TIMER_CNT == | ||
{| class="wikitable" border="1" | {| class="wikitable" border="1" | ||
! Bit | |||
! | ! Description | ||
! | |||
|- | |- | ||
| 0 | | 1-0 | ||
| Prescaler select (0=F/1, 1=F/64, 2=F/256, 3=F/1024) | | Prescaler select (0=F/1, 1=F/64, 2=F/256, 3=F/1024) | ||
|- | |- | ||
Line 37: | Line 36: | ||
| Count-up (0=Disabled, 1=Enabled) | | Count-up (0=Disabled, 1=Enabled) | ||
|- | |- | ||
| 3 | | 5-3 | ||
| Not used | | Not used | ||
|- | |- |