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Output registers hold the data to be passed to the later GPU stages and are write-only. Each of the output register is assigned a semantic by setting the corresponding [[GPU_Internal_Registers]]. Output registers o7-o15 are only available in vertex shaders.
Output registers hold the data to be passed to the later GPU stages and are write-only. Each of the output register is assigned a semantic by setting the corresponding [[GPU_Internal_Registers]]. Output registers o7-o15 are only available in vertex shaders.
Keep in mind that writing to an output register that has been previously written to within 8 cycles of the first write appears to cause the GPU to hang. After 8 cycles, all further writes to an output register appear to be ignored and do not cause a GPU hang.
Keep in mind that writing to an output register's component twice appears that writing twice appears to cause problems (e.g. GPU hangs).


Temporary registers can be used for intermediate calculations and can be both read and written.
Temporary registers can be used for intermediate calculations and can be both read and written.
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