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IO Registers: Difference between revisions

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Line 28: Line 28:
| 0x10002000
| 0x10002000
| Boot9, Process9
| Boot9, Process9
| DMA Engine
| AHB DMA Engine
|-
|-
| style="background: green" | Yes
| style="background: green" | Yes
Line 49: Line 49:
| 0x10006000 / 0x10007000
| 0x10006000 / 0x10007000
| Boot9, Process9, NewKernel9Loader
| Boot9, Process9, NewKernel9Loader
| 0x10007000 is normally not enabled on retail, all-zeros when read.
| SD(IO) controller 1 and 3. 3 is normally mapped to ARM11.
|-
|-
| style="background: green" | Yes
| style="background: green" | Yes
Line 84: Line 84:
| 0x1000C000
| 0x1000C000
| Boot9, Kernel9
| Boot9, Kernel9
| [http://infocenter.arm.com/help/topic/com.arm.doc.subset.primecell.system/index.html CoreLink™ DMA-330 r0p0] (two channels).
| [http://infocenter.arm.com/help/topic/com.arm.doc.subset.primecell.system/index.html CoreLink™ DMA-330 r0p0] (AXI busmaster, two channels, uses 32-bit bus width instead of 64).
|-
|-
| style="background: green" | Yes
| style="background: green" | Yes
Line 123: Line 123:
| style="background: green" | Yes
| style="background: green" | Yes
| A11/A9
| A11/A9
| Debug WIFI SDIO Registers?
| TMIO SD(IO) controller 3
| 0x10100000
| 0x10100000
|  
|  
| An SDIO controller is mapped here, NWM references this controller but doesn't have access to it.
| NWM references this controller but doesn't have access to it.
|-
|-
| style="background: green" | Yes
| style="background: green" | Yes
Line 217: Line 217:
| 0x10140000
| 0x10140000
| Process9, Boot11, Kernel11, TwlBg, [[DSP Services]], [[NWM Services]], [[SPI Services]]
| Process9, Boot11, Kernel11, TwlBg, [[DSP Services]], [[NWM Services]], [[SPI Services]]
| Power management.  
| System configuration.  
|-
|-
| style="background: green" | Yes
| style="background: green" | Yes
| A11/A9
| A11/A9
| [[CONFIG11 Registers]]
| [[PDN Registers]]
| 0x10141000
| 0x10141000
| Process9, Boot11, Kernel11, TwlBg, [[Codec Services]], [[NWM Services]], [[SPI Services]], [[PDN Services]]
| Process9, Boot11, Kernel11, TwlBg, [[Codec Services]], [[NWM Services]], [[SPI Services]], [[PDN Services]]
Line 249: Line 249:
| style="background: green" | Yes
| style="background: green" | Yes
| A11/A9
| A11/A9
| [[CODEC Registers]]
| [[I2S Registers]]
| 0x10145000
| 0x10145000
| TwlBg, [[Codec Services]]
| TwlBg, AgbBg, [[Codec Services]]
|  
| Sound input/output lines
|-
|-
| style="background: green" | Yes
| style="background: green" | Yes
Line 389: Line 389:
| style="background: green" | Yes
| style="background: green" | Yes
| A11
| A11
| ?
| FCRAM configuration
| 0x10201000
| 0x10201000
| TwlBg
| TwlBg, Kernel11 (dead code)
|
|
|-
|-
Line 407: Line 407:
| [[DSP Services]]
| [[DSP Services]]
| see the "DSi XpertTeak" section in [http://problemkaputt.de/gba.htm no$gba] help.
| see the "DSi XpertTeak" section in [http://problemkaputt.de/gba.htm no$gba] help.
|-
|-style="border-top: double"
| style="background: green" | Yes
| style="background: red" | No
| A11
| A11
|  
| ?
| 0x10204000
| 0x10204000
| ?
|  
|  
|
|-
|-style="border-top: double"
|  style="background: red" | No
|  style="background: red" | No
| A11
| A11
Line 434: Line 434:
| 0x1020F000
| 0x1020F000
| TwlBg, [[GSP Services]]
| TwlBg, [[GSP Services]]
| [http://infocenter.arm.com/help/topic/com.arm.doc.ddi0422a/CHDGHIID.html CoreLink™ NIC-301 r1p0].
| [https://developer.arm.com/documentation/ddi0422/d/programmers-model/register-summary CoreLink™ NIC-301 r1p2].
|-style="border-top: double"
|-style="border-top: double"
| style="background: green" | Yes
| style="background: green" | Yes
| A11
| A11
| DMA region
| AHB (or AXI?) FIFOs region
| 0x10300000-0x10400000
| 0x10300000-0x10340000
|
|
| CDMA wants these addresses. Most pages in this region correspond to the same respective pages in the 0x10100000-0x10200000 region. The HASH FIFO register is located at 0x10301000 only.
| Pages present in this region correspond to the same respective devices in the 0x10100000-0x10140000 region but don't hold the same registers. They hold the FIFOs instead: the HASH FIFO register is located at 0x10301000. The LgyFb scaler data FIFO are located at 0x10310000 (top) and 0x10311000 (bot), etc. Needed for DMA.
|-style="border-top: double"
|-style="border-top: double"
| style="background: green" | Yes
| style="background: green" | Yes
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