Thread Local Storage: Difference between revisions

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Neobrain (talk | contribs)
Couldn't find this info anywhere. If it was already somewhere else, at least it's discoverable now :p
Kynex7510 (talk | contribs)
Document exception handler fields
 
Line 13: Line 13:
!  Description
!  Description
|-
|-
| 0
| 0x00
| 0x40
| Undefined, can be used by application for any purpose
|-
| 0x40
| 0x44
| Exception handler return address
|-
| 0x44
| 0x48
| Exception handler SP control (1 = use aligned SP, other = use arbitrary memory, must be mapped & RW)
|-
| 0x48
| 0x4C
| Exception handler [[ERR:Throw#Exception|context]] control (0 = use SP control memory, 1 = use aligned SP, other = use arbitrary memory, must be mapped & RW)
|-
| 0x4C
| 0x80
| 0x80
| Undefined, can be used by application for any purpose.
| Undefined
|-
|-
| 0x80
| 0x80

Latest revision as of 00:29, 2 November 2024

Each thread is given a 0x200-byte thread-local-storage block by the kernel. It is used during IPC communications. Each KProcess has a linked list of KThreadLocalPage objects and each object has a pointer to a page(0x1000 bytes) of FCRAM, which is used for up to 8 thread-local-storage blocks. The KThreadLocalPage is used to track which thread-local-storage blocks are used so it can allocate new ones as new threads are created.

A pointer to the thread-local-storage can be read using the ARM instruction:

mrc        15, 0, rX, cr13, cr0, 3

Every application has RW access to its thread-local-storage.

The kernel requires the application to put IPC parameters and IPC static buffers inside the thread-local-storage:

Offset Size Description
0x00 0x40 Undefined, can be used by application for any purpose
0x40 0x44 Exception handler return address
0x44 0x48 Exception handler SP control (1 = use aligned SP, other = use arbitrary memory, must be mapped & RW)
0x48 0x4C Exception handler context control (0 = use SP control memory, 1 = use aligned SP, other = use arbitrary memory, must be mapped & RW)
0x4C 0x80 Undefined
0x80 0x100 IPC command with parameters
0x180 0x80 IPC static buffers: 16 pairs of a static buffer translation descriptor (specifying the buffer size) and a buffer pointer