GSP Shared Memory: Difference between revisions

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PSC + small edits
Kynex7510 (talk | contribs)
TransferEngine
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This command sets the GPU [[GPU/External_Registers#Memory_Fill|Memory Fill registers]].
This command sets the [[GPU/External_Registers#Memory_Fill|Memory Fill registers]].


Addresses should be aligned to 8 bytes and must be in linear, QTM or VRAM memory, otherwise error 0xE0E02BF5 (GSP_INVALID_ADDRESS) is returned. The start address for a buffer must be < its end address, else the same error is returned. If the start address for a buffer is 0, that buffer is skipped; otherwise, its relative PSC unit is used for the fill operation.
Addresses should be aligned to 8 bytes and must be in linear, QTM or VRAM memory, otherwise error 0xE0E02BF5 (GSP_INVALID_ADDRESS) is returned. The start address for a buffer must be less than its end address, else the same error is returned. If the start address for a buffer is 0, that buffer is skipped; otherwise, its relative PSC unit is used for the fill operation.


=== Trigger Display Transfer ===
=== Trigger Display Transfer ===
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|-
|-
| 1
| 1
| Input framebuffer address
| Source address
|-
|-
| 2
| 2
| Output framebuffer address
| Destination address
|-
|-
| 3
| 3
| Input framebuffer [[GPU|dimensions]]
| Source dimensions
|-
|-
| 4
| 4
| Output framebuffer dimensions
| Output dimensions
|-
|-
| 5
| 5
| [[GPU|Flags]], for applications this is 0x1001000 for the main screen, and 0x1000 for the sub screen.
| Flags
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|-
| 7-6
| 7-6
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This command converts the specified addresses to physical addresses, then writes these physical addresses and parameters to the [[GPU]] registers at 0x1EF00C00. This GPU command copies the already rendered framebuffer data from the input GPU framebuffer address to the specified output LCD framebuffer. The input framebuffer is normally located in VRAM.
This command sets the [[GPU/External_Registers#Transfer_Engine|Display Transfer registers]].


The GPU color buffer is stored in the same Z-curve (tiled) format as textures. By default, SetDisplayTransfer converts the given buffer from the tiled format to a linear format adapted to the LCD framebuffers.
No error checking is performed on the parameters. Addresses should be aligned to 8 bytes and should be in linear, QTM or VRAM memory, otherwise PA 0 is used.
 
Display transfers are performed asynchronously, so after requesting a display transfer you should wait for the PPF interrupt to fire before reading the output data.
 
The minimum supported dimension for output is 64x64, anything lower will hang the engine.


=== Trigger Texture Copy ===
=== Trigger Texture Copy ===
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|-
|-
| 1
| 1
| Input buffer address.
| Source address
|-
|-
| 2
| 2
| Output buffer address.
| Destination address
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|-
| 3
| 3
| Total bytes to copy, not including gaps.
| Size
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|-
| 4
| 4
| Bits 0-15: Size of input line, in bytes. Bits 16-31: Gap between input lines, in bytes.
| Line width <nowiki>|</nowiki> (gap << 16)
|-
|-
| 5
| 5
| Same as 4, but for the output.
| Same as above, for the destination
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|-
| 6
| 6
| Flags, corresponding to the [[GPU/External_Registers#Transfer_Engine|Transfer Engine flags]]. However, for TextureCopy commands, bit 3 is always set, bit 2 is set if any output dimension is smaller than the input, and other bits are always 0.
| Flags
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|-
| 7
| 7
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This command is similar to cmd3. It also triggers the [[GPU/External_Registers#Transfer_Engine|GPU Transfer Engine]], but setting the TextureCopy parameters.
This command sets the [[GPU/External_Registers#TextureCopy|Texture Copy registers]]. Note that GSP doesn't enforce bit3 of the flags to be set.
 
No error checking is performed on the parameters. Addresses and size should be aligned to 8 bytes, and the addresses should be in linear, QTM or VRAM memory, otherwise PA 0 is used.


=== Flush Cache Regions ===
=== Flush Cache Regions ===