PXI Registers: Difference between revisions
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| |- | |- | ||
| | style="background: green" | Yes | | style="background: green" | Yes | ||
| |  | | [[#PXI_SYNC|PXI_SYNC]]9 | ||
| | 0x10008000 | | 0x10008000 | ||
| | 4 | | 4 | ||
| | | | Boot9, Process9 | ||
| |- | |- | ||
| | style="background: green" | Yes | | style="background: green" | Yes | ||
| |  | | [[#PXI_CNT|PXI_CNT]]9 | ||
| | 0x10008004 | | 0x10008004 | ||
| | 2 | |||
| | Boot9, Process9 | |||
| |- | |||
| | style="background: green" | Yes | |||
| | PXI_SEND9 | |||
| | 0x10008008 | |||
| | 4 | | 4 | ||
| | | | | ||
| |- | |- | ||
| | style="background: green" | Yes | | style="background: green" | Yes | ||
| |  | | PXI_RECV9 | ||
| |  | | 0x1000800C | ||
| | 4 | | 4 | ||
| | | | | ||
| |- | |-style="border-top: double" | ||
| | style="background: green" | Yes | | style="background: green" | Yes | ||
| |  | | [[#PXI_SYNC|PXI_SYNC]]11 | ||
| | 0x10163000 | | 0x10163000 | ||
| | 4 | | 4 | ||
| | | | Boot11 | ||
| |- | |- | ||
| | style="background: green" | Yes | | style="background: green" | Yes | ||
| |  | | [[#PXI_CNT|PXI_CNT]]11 | ||
| | 0x10163004 | | 0x10163004 | ||
| |  | | 2 | ||
| | | | Boot11 | ||
| |- | |- | ||
| | style="background: green" | Yes | | style="background: green" | Yes | ||
| Line 44: | Line 50: | ||
| |- | |- | ||
| | style="background: green" | Yes | | style="background: green" | Yes | ||
| |  | | PXI_RECV11 | ||
| | 0x1016300C | | 0x1016300C | ||
| | 4 | | 4 | ||
| Line 51: | Line 57: | ||
| The PXI registers are similar to those on DS. | The PXI registers are similar to those on DS. | ||
| == PXI_SYNC == | |||
| {| class="wikitable" border="1" | |||
| !  Bit | |||
| !  RW | |||
| !  Description | |||
| |- | |||
| | 0-7 | |||
| | R | |||
| | Data received from remote bits 8-15 (unrelated to SEND/RECV FIFOs) | |||
| |- | |||
| | 8-15 | |||
| | R/W | |||
| | Data sent to remote bits 0-7 | |||
| |- | |||
| | 23 | |||
| | ? | |||
| | ? | |||
| |- | |||
| | 29 | |||
| | W? | |||
| | Trigger PXI_SYNC11 IRQ (if enabled) | |||
| |- | |||
| | 30 | |||
| | W? | |||
| | Trigger PXI_SYNC9 IRQ (if enabled) | |||
| |- | |||
| | 31 | |||
| | RW | |||
| | PXI_SYNC IRQ enable (for local processor) | |||
| |} | |||
| This can also be accessed as 4 u8 registers. | |||
| == PXI_CNT == | == PXI_CNT == | ||