KThreadContext: Difference between revisions

Bond697 (talk | contribs)
No edit summary
No edit summary
 
(4 intermediate revisions by 2 users not shown)
Line 33: Line 33:
| u32[4]
| u32[4]
| SVC access control data copied from KThread's owner process
| SVC access control data copied from KThread's owner process
|-
| 0xF48 (page_end - 0xB8)
| u8[4]
| Debug info (read by the SVC handler):
0: Bit0: reschedule.  Bit1: switch context. If non zero, and depending on <code>currentThread->shallTerminate</code>, send thread exit debug events after handling valid/authorized SVCs (except 0xFF). Cleared to zero after handling. Bit2: lock debug features
1: "Allow debug" flag from the process's exheader. If set, <code>{r0-r7, r12, lr_svc}</code> will be pushed (they'll always be when handling invalid/unauthorized SVCs/SVC 0xFF). Needed for svcGetThreadContext and svcSetThreadContext to work properly in contexts other than exception handling (incl. hardware breakpoints). If lr_svc is set to one in this frame, the registers are reloaded from it (used with svcBreak, svc 0xff, etc).
2: ?
3: ID of the SVC being handled (reset to 0 when done).
|-
|-
| 0xF50 (page_end - 0xB0)
| 0xF50 (page_end - 0xB0)
| u32[10]
| u32[10]
| SVC mode registers, r4-r11, r13, r14
| SVC mode registers, r4-r11, r13, r14
|-
| 0xF78
| f64[16]
| VFP registers aliased as 16 double precision, 64-bit registers
|-
|-
| 0xFF8
| 0xFF8
| u32
| u32
| FPEXC, floating point exception register for thread- stored and loaded on context switches
| FPEXC, floating point exception register for thread- stored and loaded on context switches
|-
| 0xFFC
| u32
| FPSCR, floating point status and control register
|}
|}