ARM11 Interrupts: Difference between revisions
mNo edit summary |
Clarify PDC interrupt use |
||
| (One intermediate revision by one other user not shown) | |||
| Line 18: | Line 18: | ||
| 0x1-0x3 | | 0x1-0x3 | ||
| | | | ||
| MPCore software-interrupt. Used by Boot11 and Kernel11 to kickstart Core1/2/3. | | MPCore software-interrupt. Used by Boot11 and Kernel11 to kickstart Core1/2/3, and by Kernel11 to sync cores in crt0. | ||
|- | |- | ||
| 0x4 | | 0x4 | ||
| Kernel | | Kernel | ||
| MPCore software-interrupt. Used to manage the performance counter. | | MPCore software-interrupt. Used to manage the performance counter. Also used by Kernel11 during crt0 to sync up. | ||
|- | |- | ||
| 0x5 | | 0x5 | ||
| Line 88: | Line 88: | ||
| 0x2A | | 0x2A | ||
| gsp, TwlBg | | gsp, TwlBg | ||
| PDC0 (VBlank0) | | PDC0 (Top screen VBlank0, HBlank0) | ||
|- | |- | ||
| 0x2B | | 0x2B | ||
| gsp, TwlBg | | gsp, TwlBg | ||
| PDC1 (VBlank1) | | PDC1 (Bottom screen VBlank1, HBlank1) | ||
|- | |- | ||
| 0x2C | | 0x2C | ||