Video Capture: Difference between revisions

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 == Lower Screen Dump ==
-pinout point ("TP"+number)
+Test Points on the front of the board:
 {| class="wikitable" border="1"
 |-
-! point name !! signal name
+! # || Name || TP || RED || # || Name || TP || GREEN || # || Name || TP || BLUE
 |-
-| 184 || R0
+| '''10'''  || CN2-31 || 184 || R0 || '''20''' || CN2-39 || 186 || G0 || '''24''' || CN1-34 || 188 || B0
 |-
-| 178 || R1
+| '''12'''  || CN2-32 || 178 || R1 || '''19''' || CN2-40 || 180 || G1 || '''18''' || CN1-33 || 182 || B1
 |-
-| 172 || R2
+| '''13''' || CN2-33 || 172 || R2 || '''21''' || CN1-40 || 174 || G2 || '''17''' || CN1-32 || 176 || B2
-|-
-| 166 || R3
 |-
-| 183 || R4
+| '''11''' || CN2-34 || 166 || R3 || '''14''' || CN1-39 || 168 (above 180) || G3 || '''23''' || CN1-31 || 170 || B3
 |-
-| 177 || R5
+| '''2'''  || CN2-35 || 183 || R4 || '''22''' || CN1-38 || 185 || G4 || '''5''' || CN1-30 || 187 || B4
 |-
-| 171 || R6
+| '''3'''  || CN2-36 || 177 || R5 || '''16''' || CN1-37 || 179 || G5 || '''6''' || CN1-29 || 181 || B5
 |-
-| 165 || R7
+| '''1'''  || CN2-37 || 171 || R6 || '''15''' || CN1-36 || 173 (below 179) || G6 || '''7''' || CN1-28 || 175 || B6
 |-
-| 186 || G0
+| '''4'''  || CN2-38 || 165 || R7 || '''9''' || CN1-35 || 167 || G7 || '''8''' || CN1-27 || 169 || B7
+|}
+{| class="wikitable" border="1"
 |-
-| 180 || G1
+! # || Name || TP || Description
 |-
-| 174 || G2
+| '''25'''  || CN2-30 || 189 || CLK
 |-
-| below 180(14) || G3
+| '''26'''  || CN2-28 || 191 || VSYNC
 |-
-| 185 || G4
+| '''27'''  || CN2-27 || 190 || HSYNC
-|-
+|}
-| 179 || G5
-|-
+This table (taken from the picture above) shows which TP (test-point) to get the bit of the corresponding color (R=red, G=green, B=blue).
-| below 179(15) || G6
-|-
+And the TP to get Clock, Vertical-Sync and Horizontal-Sync.
-| 167 || G7
-|-
+== Captured Video Control Signals ==
-| 188 || B0
-|-
+The following picutres show plots of the control signals CLK (TP189), HSYNC (TP190) and VSYNC (TP191). The used sample rate were 50MHz.
-| 182 || B1
-|-
+The full plot shows about 2.6ms.
-| 176 || B2
-|-
+[[File:Stp_PCLK_VSYNC_HSYNC_full.jpg|1200px]]
-| 170 || B3
-|-
+This plot shows 1.28us, mainly featuring the clock
-| 187 || B4
-|-
+[[File:Stp_PCLK_VSYNC_HSYNC_0..64.jpg|1200px]]
-| 181 || B5
-|-
+Setup
-| 175 || B6
-|-
+The signal capturing was done by using an DE10-NANO FPGA development board, Intel signal tap analyzer and 5 wires soldered to the TPs of an EU-O3DS (roughly 25cm long, parallel wired).
-| 169 || B7
-|-
-| 189 || CLR
-|-
-| 191 || VSYNC
-|-
-| 190 || HSYNC
-|}
-This table (taken from the picture above) shows which TP (test-point) to get the bit of the corresponding color (R=red, G=green, B=blue)
+VCD and CVS files:
+[[Media: Stp_PCLK_VSYNC_HSYNC.7z]]
+(to view the VCD file use GTK Wave or similar programs).
 == Links ==
-* DS Version (DSCapture) : http://home.comcast.net/~olimar/DSCapture/
+* DS Version (DSCapture): http://www.3dscapture.com/ds
-* Link to get a kit in Japan: http://katsukity.ocnk.net/product/20
+* DS Version(NisetroCaptureDS): http://www.3dsvideocapture.com/product-list/1
-* Pic: http://home.comcast.net/~olimar/3DSCapture/dev/04.jpg
+* DSi Version(NisetroCaptureDSi): http://www.3dsvideocapture.com/product-list/2
-* Youtube video of it working: http://www.youtube.com/watch?v=FI4qVzaM1PI
+* 3DS Version(NisetroCapture3DS): http://www.3dsvideocapture.com/product-list/3
+* New3DS Version(NisetroCaptureNew3DS): http://www.3dsvideocapture.com/product-list/12
+* New3DS XL Version(NisetroCapturenew3DSXL): http://www.3dsvideocapture.com/product-list/11
+* Pics+Progress Updates (3DSCapture): http://www.3dscapture.com/
+* YouTube video of Loopy's Device (USB): http://www.youtube.com/watch?v=mT0DuQleuhY
+* YouTube video of Loopy's Device (HDMI): http://www.youtube.com/watch?v=s99fUS68AB4