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EMMC Registers: Difference between revisions

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These registers are used to access the system [[Flash_Filesystem|NAND]] and the inserted SD card. Both devices use the same interface. HCLK of the SDMMC controller is 67.027964 MHz (double of the DSi HCLK).
=Registers=
{| class="wikitable" border="1"
{| class="wikitable" border="1"
!  NAME
!  Old3DS
!  PHYSICAL ADDRESS
!  Name
!  WIDTH
!  Address
!  Width
!  Used by
|-
|-
| REG_SDCMD
| style="background: green" | Yes
| EMMC_CMD
| 0x10006000
| 0x10006000
| 2
| 2
| Boot9, NewKernel9Loader, Process9
|-
|-
| REG_SD???
| style="background: green" | Yes
| EMMC_PORTSEL
| 0x10006002
| 0x10006002
| 2
| 2
| Port selection, 0 = SD card, 1 = NAND
|-
|-
| REG_SDCMDARG0
| style="background: green" | Yes
| EMMC_CMDARG0
| 0x10006004
| 0x10006004
| 2
| 2
|
|-
|-
| REG_SDCMDARG1
| style="background: green" | Yes
| EMMC_CMDARG1
| 0x10006006
| 0x10006006
| 2
| 2
|
|-
|-
| REG_SDSTOP
| style="background: green" | Yes
| EMMC_STOP
| 0x10006008
| 0x10006008
| 2
| 2
|
|-
|-
| REG_SDBLKCOUNT
| style="background: green" | Yes
| EMMC_BLKCOUNT
| 0x1000600a
| 0x1000600a
| 2
| 2
|
|-
|-
| REG_SDRESP0-7
| style="background: green" | Yes
| EMMC_RESP0-7
| 0x1000600c
| 0x1000600c
| 2*8
| 2*8
|
|-
|-
| REG_SDSTATUS0
| style="background: green" | Yes
| [[#EMMC_STATUS0|EMMC_STATUS0]]
| 0x1000601c
| 0x1000601c
| 2
| 2
|
|-
|-
| REG_SDSTATUS1
| style="background: green" | Yes
| EMMC_STATUS1
| 0x1000601e
| 0x1000601e
| 2
| 2
|
|-
|-
| REG_SD???
| style="background: green" | Yes
| ?
| 0x10006020
| 0x10006020
| 2
| 2
|
|-
|-
| REG_SD???
| style="background: green" | Yes
| ?
| 0x10006022
| 0x10006022
| 2
| 2
|
|-
|-
| REG_SDCLKCTL
| style="background: green" | Yes
| EMMC_CLKCTL
| 0x10006024
| 0x10006024
| 2
| 2
|
|-
|-
| REG_SDBLKLEN
| style="background: green" | Yes
| EMMC_BLKLEN
| 0x10006026
| 0x10006026
| 2
| 2
|
|-
|-
| REG_SDOPT
| style="background: green" | Yes
| EMMC_OPT
| 0x10006028
| 0x10006028
| 2
| 2
|
|-
|-
| REG_SDFIFO
| style="background: green" | Yes
| EMMC_FIFO
| 0x10006030
| 0x10006030
| 2
| 2
|
|-
| style="background: green" | Yes
| EMMC_RESET
| 0x100060E0
| 2
|
|-
|}
|}


The IO interface for SDMC/NAND seems to be very similar to the DSi; see libnds for [http://sourceforge.net/p/devkitpro/libnds/ci/master/tree/source/arm7/sdmmc.c sample code] and [http://sourceforge.net/p/devkitpro/libnds/ci/master/tree/include/nds/arm7/sdmmc.h documentation].
The IO interface for SDMC/NAND seems to be very similar to the DSi; see libnds for [https://github.com/devkitPro/libnds/blob/master/source/arm7/sdmmc.twl.c sample code] and [https://github.com/devkitPro/libnds/blob/master/include/nds/arm7/sdmmc.h documentation], and GBATEK for [http://problemkaputt.de/gbatek.htm#dsisdmmcioportscommandparamresponsedata better documentation].


3DS SDMC/NAND IO registers are located at 0x10006000 and apparently mirrored at 0x10007000. It seems the 0x10007000 mirror is never used on retail units.
3DS SDMC/NAND IO registers are located at 0x10006000 and apparently mirrored at 0x10007000. It seems the 0x10007000 mirror is never used on retail units.
==EMMC_STATUS0==
{| class="wikitable" border="1"
!  Bit
!  Description
|-
| 3
| SD card removal flag (Set to 1 when SD card is removed)
|-
| 4
| SD card insertion flag (Set to 1 when SD card is inserted)
|-
| 5
| SD card insertion status (0 = missing, 1 = inserted)
|-
|}
===SD card insertion status===
Assertion happens around 250 ms after SD card insertion and/or enabling the EMMC hardware (delay could possibly be due to an SD bus timeout?).
Retrieved from "https://www.3dbrew.org/wiki/EMMC_Registers"