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→PDN_TWLMODE_0
==PDN_TWLMODE_0==
==PDN_TWLMODE_0==
Observed 0x8001 when running under TWL_FIRM, 0 NATIVE_FIRM.
Observed 0x8001 when running under TWL_ and AGB_FIRM, 0 NATIVE_FIRM.
The very last 3DS-mode register poke the [[FIRM|TWL_FIRM]] Process9 does before it gets switched into TWL-mode, is writing 0x8000 to this register. Before writing this register, TWL Process9 waits for the value of this register to become non-zero. The Process9 code for this runs from ITCM, since switching into TWL-mode includes remapping all ARM9 physical memory.
This address is poked from ARM7 to signal that it has booted and begun executing code. The ARM7-mode address for this register is 0x4700000.
The very last 3DS-mode register poke the [[FIRM|TWL_FIRM]] Process9 does before it gets switched into TWL-mode, is writing 0x8000 to this register. Before writing this register, TWL Process9 waits for ARM7 to change the value of this register. The Process9 code for this runs from ITCM, since switching into TWL-mode includes remapping all ARM9 physical memory.
Writing 0x8000 to here from the ARM9 with NATIVE_FIRM running doesn't seem to do anything, other reg-pokes likely need done first.
Writing 0x8000 to here from the ARM9 with NATIVE_FIRM running doesn't seem to do anything, other reg-pokes likely need done first.