SVC: Difference between revisions
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Handle* thread=R1 | Handle* thread=R1 | ||
This processorid is a bitmask for which processors the thread can be run on. Bit value zero enables thread execution for this CPUID, bit value one disables thread execution for this CPUID. Bit0- | This processorid is a bitmask for which processors the thread can be run on. Bit value zero enables thread execution for this CPUID, bit value one disables thread execution for this CPUID. Bit0-<...> are for CPUID0-CPUID<...>. The thread priority value must be in the following range: 0x0..0x3F. | ||
With the Old3DS kernel, the s32 processorid must be <=2. With the New3DS kernel, processorid must be <= <total cores(MPCore "SCU Configuration Register" CPU number value + 1)>. | |||
The stacktop must be aligned to 0x8-bytes, otherwise when not aligned to 0x8-bytes the ARM11 kernel clears the low 3-bits of the stacktop address. | The stacktop must be aligned to 0x8-bytes, otherwise when not aligned to 0x8-bytes the ARM11 kernel clears the low 3-bits of the stacktop address. | ||