GPU/Shader Instruction Set: Difference between revisions
fixed MAD SRC order |
|||
| Line 150: | Line 150: | ||
| 0x5 | | 0x5 | ||
| 0x5 | | 0x5 | ||
| Source | | Source 3 register (SRC3) | ||
|- | |- | ||
| 0xA | | 0xA | ||
| Line 158: | Line 158: | ||
| 0x11 | | 0x11 | ||
| 0x7 | | 0x7 | ||
| Source | | Source 1 register (SRC1) | ||
|- | |- | ||
| 0x18 | | 0x18 | ||
| Line 301: | Line 301: | ||
| 5 | | 5 | ||
| MAD | | MAD | ||
| Multiplies two vectors and adds a third one component by component; DST[i] = | | Multiplies two vectors and adds a third one component by component; DST[i] = SRC3[i] + SRC2[i].SRC1[i] for all i (modulo destination component masking) | ||
|} | |} | ||