GPU/Shader Instruction Set: Difference between revisions
JMPU |
added unknown format 1 opcodes |
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== Instruction formats == | == Instruction formats == | ||
Format 1 : (used for register | Format 1 : (used for register operations) | ||
{| class="wikitable" border="1" | {| class="wikitable" border="1" | ||
|- | |- | ||
| Line 41: | Line 41: | ||
|} | |} | ||
Format 1i : (used for register | Format 1i : (used for register operations) | ||
{| class="wikitable" border="1" | {| class="wikitable" border="1" | ||
|- | |- | ||
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|} | |} | ||
Format 1c : (used for comparison | Format 1u : (used for unary register operations) | ||
{| class="wikitable" border="1" | |||
|- | |||
! Offset | |||
! Size (bits) | |||
! Description | |||
|- | |||
| 0x0 | |||
| 0x7 | |||
| Operand descriptor ID (DESC) | |||
|- | |||
| 0xC | |||
| 0x7 | |||
| Source 1 register (SRC1) | |||
|- | |||
| 0x13 | |||
| 0x2 | |||
| Address register index (IDX) | |||
|- | |||
| 0x15 | |||
| 0x5 | |||
| Destination register (DST) | |||
|- | |||
| 0x1A | |||
| 0x6 | |||
| Opcode | |||
|} | |||
Format 1c : (used for comparison operations) | |||
{| class="wikitable" border="1" | {| class="wikitable" border="1" | ||
|- | |- | ||
| Line 240: | Line 268: | ||
| DP4 | | DP4 | ||
| Computes dot product on 4-component vectors; DST = SRC1.SRC2 | | Computes dot product on 4-component vectors; DST = SRC1.SRC2 | ||
|- | |||
| 0x03 | |||
| 1 | |||
| ??? | |||
| ? | |||
|- | |||
| 0x05 | |||
| 1 | |||
| ??? | |||
| ? | |||
|- | |||
| 0x06 | |||
| 1 | |||
| ??? | |||
| ? | |||
|- | |- | ||
| 0x08 | | 0x08 | ||
| Line 245: | Line 288: | ||
| MUL | | MUL | ||
| Multiplies two vectors component by component; DST[i] = SRC1[i].SRC2[i] for all i (modulo destination component masking) | | Multiplies two vectors component by component; DST[i] = SRC1[i].SRC2[i] for all i (modulo destination component masking) | ||
|- | |||
| 0x09 | |||
| 1 | |||
| ??? | |||
| ? | |||
|- | |||
| 0x0A | |||
| 1 | |||
| ??? | |||
| ? | |||
|- | |||
| 0x0B | |||
| 1u | |||
| ??? | |||
| ? | |||
|- | |- | ||
| 0x0C | | 0x0C | ||
| Line 280: | Line 338: | ||
| DP4I? | | DP4I? | ||
| Computes dot product on 4-component vectors; DST = SRC1.SRC2 ? | | Computes dot product on 4-component vectors; DST = SRC1.SRC2 ? | ||
|- | |||
| 0x1A | |||
| 1 | |||
| ??? | |||
| ? | |||
|- | |||
| 0x1B | |||
| 1 | |||
| ??? | |||
| ? | |||
|- | |- | ||
| 0x21 | | 0x21 | ||