PXI Registers: Difference between revisions
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|- | |- | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
| | | [[#PXI_SYNC|PXI_SYNC]]9 | ||
| 0x10008000 | | 0x10008000 | ||
| 4 | | 4 | ||
| Line 14: | Line 14: | ||
|- | |- | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
| | | [[#PXI_CNT|PXI_CNT]]9 | ||
| 0x10008004 | | 0x10008004 | ||
| 4 | | 4 | ||
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| 4 | | 4 | ||
| | | | ||
|- | |-style="border-top: double" | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
| | | [[#PXI_SYNC|PXI_SYNC]]11 | ||
| 0x10163000 | | 0x10163000 | ||
| 4 | | 4 | ||
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|- | |- | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
| | | [[#PXI_CNT|PXI_CNT]]11 | ||
| 0x10163004 | | 0x10163004 | ||
| 4 | | 4 | ||
| Line 51: | Line 51: | ||
The PXI registers are similar to those on DS. | The PXI registers are similar to those on DS. | ||
== PXI_SYNC == | |||
{| class="wikitable" border="1" | |||
! Bit | |||
! RW | |||
! Description | |||
|- | |||
| 0-3 | |||
| R | |||
| Data input from PXI_SYNC Bit8-11 of remote CPU (00h..0Fh) | |||
|- | |||
| 8-11 | |||
| R/W | |||
| Data output to PXI_SYNC Bit0-3 of remote CPU (00h..0Fh) | |||
|- | |||
| 13 | |||
| W | |||
| Send IRQ to remote CPU (0=None, 1=Send IRQ) | |||
|- | |||
| 14 | |||
| R/W | |||
| Enable IRQ from remote CPU (0=Disable, 1=Enable) | |||
|} | |||
== PXI_CNT == | == PXI_CNT == | ||
Revision as of 02:28, 22 March 2015
Registers
| Old3DS | Name | Address | Width | Used by |
|---|---|---|---|---|
| Yes | PXI_SYNC9 | 0x10008000 | 4 | |
| Yes | PXI_CNT9 | 0x10008004 | 4 | |
| Yes | PXI_RECV_FIFO9 | 0x10008008 | 4 | |
| Yes | PXI_SYNC11 | 0x10163000 | 4 | |
| Yes | PXI_CNT11 | 0x10163004 | 4 | |
| Yes | PXI_SEND11 | 0x10163008 | 4 | |
| Yes | PXI_RECV_11 | 0x1016300C | 4 |
The PXI registers are similar to those on DS.
PXI_SYNC
| Bit | RW | Description |
|---|---|---|
| 0-3 | R | Data input from PXI_SYNC Bit8-11 of remote CPU (00h..0Fh) |
| 8-11 | R/W | Data output to PXI_SYNC Bit0-3 of remote CPU (00h..0Fh) |
| 13 | W | Send IRQ to remote CPU (0=None, 1=Send IRQ) |
| 14 | R/W | Enable IRQ from remote CPU (0=Disable, 1=Enable) |
PXI_CNT
| Bit | RW | Description |
|---|---|---|
| 0 | R | Send Fifo Empty Status (0=Not Empty, 1=Empty) |
| 1 | R | Send Fifo Full Status (0=Not Full, 1=Full) |
| 2 | R/W | Send Fifo Empty IRQ (0=Disable, 1=Enable) |
| 3 | W | Send Fifo Clear (0=Nothing, 1=Flush Send Fifo) |
| 8 | R | Receive Fifo Empty (0=Not Empty, 1=Empty) |
| 9 | R | Receive Fifo Full (0=Not Full, 1=Full) |
| 10 | R/W | Receive Fifo Not Empty IRQ (0=Disable, 1=Enable) |
| 14 | R/W | Error, Read Empty/Send Full (0=No Error, 1=Error/Acknowledge) |
| 15 | R/W | Enable Send/Receive Fifo (0=Disable, 1=Enable) |