GPU/Shader Instruction Set: Difference between revisions
→Instructions: Confirmed JMPU invert bit |
Fixed MAD/MADI encoding |
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| Line 248: | Line 248: | ||
|- | |- | ||
| 0x11 | | 0x11 | ||
| | | 0x5 | ||
| Source 1 register (SRC1) | | Source 1 register (SRC1) | ||
|- | |||
| 0x16 | |||
| 0x2 | |||
| Address register index for SRC2 (IDX_2) | |||
|- | |- | ||
| 0x18 | | 0x18 | ||
| Line 280: | Line 284: | ||
|- | |- | ||
| 0x11 | | 0x11 | ||
| | | 0x5 | ||
| Source 1 register (SRC1) | | Source 1 register (SRC1) | ||
|- | |||
| 0x16 | |||
| 0x2 | |||
| Address register index for SRC3 (IDX_3) | |||
|- | |- | ||
| 0x18 | | 0x18 | ||