MTX Registers: Difference between revisions
m Added missing interrupt register |
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==Matrix unit== | ==Matrix unit== | ||
There are two matrix units, one at +0x200, and the other one at +0x300 | There are two matrix units, one at +0x200, and the other one at +0x300, possibly one for each axis (X and Y) | ||
{| class="wikitable" border="1" | {| class="wikitable" border="1" | ||
| Line 48: | Line 48: | ||
| 4 | | 4 | ||
| Kernel width - 1 is written here, 1 <= width <= 8 | | Kernel width - 1 is written here, 1 <= width <= 8 | ||
This decides how many pixels are written each batch. | |||
|- | |- | ||
| 0x1EC1xn04 | | 0x1EC1xn04 | ||
| KRN_PATTERN_BITS | | KRN_PATTERN_BITS | ||
| 4 | | 4 | ||
| If the corresponding bit is set then a new pixel is read | | If the corresponding bit for the current batch iteration index is set then a new pixel is read. | ||
This value is | The amount of set bits determine how many pixels are read each batch. Any bit indexes past KRN_WIDTH are ignored. | ||
This value is 8 bits, but it has to be written with a 32bit write. | |||
|- | |- | ||
| 0x1EC1xn40 | | 0x1EC1xn40 | ||
| Line 62: | Line 66: | ||
|- | |- | ||
|} | |} | ||
=Descriptions= | =Descriptions= | ||