GSP Shared Memory: Difference between revisions
m Typo |
Elaborate on GX command 0 |
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== Commands == | == Commands == | ||
Addresses specified in parameters are virtual addresses. | Addresses specified in parameters are virtual addresses. Address and size parameters except for command 0 and command 5 must be 8-byte aligned. | ||
Address and size parameters except for command 0 and command 5 must be 8-byte aligned. | |||
=== Trigger DMA Request === | === Trigger DMA Request === | ||
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This command is | This command issues a [[Corelink_DMA_Engines|DMA request]] as the calling process. When the destination address is within VRAM, GSP places itself as the destination process, this makes it possible to transfer data in VRAM without needing it listed in the destination process [[NCCH/Extended_Header#ARM11_Kernel_Capabilities|exheader mappings]]. Otherwise, both source and destination of the DMA request are the calling process. | ||
The source buffer must be mapped as readable in the source process, while the destination address must be mapped as writable in the destination process. When flushing is enabled and the source address is above VRAM, [[SVC|svcFlushProcessDataCache]] is used to flush the source buffer. | |||
=== Trigger Command List Processing === | === Trigger Command List Processing === |