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GSP Shared Memory: Difference between revisions

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P3D command
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This command sets the GPU [[GPU/External_Registers#Command_List|command list registers]], and optionally updates gas additive blend results after command processing has ended.
This command sets the [[GPU/External_Registers#Command_List|Command List registers]], and optionally updates gas additive blend results after command processing has ended.


No error checking is performed on the parameters. address and size should be both 8-byte aligned, and the address should be in linear, QTM or VRAM memory, otherwise PA 0 is returned by the vaddr->paddr conversion code. When flushing is enabled, svcFlushProcessDataCache is used to flush the buffer.
No error checking is performed on the parameters. Address and size should be both aligned to 8 bytes, and the address should be in linear, QTM or VRAM memory, otherwise PA 0 is used. When flushing is enabled, svcFlushProcessDataCache is used to flush the buffer.


=== Trigger Memory Fill ===
=== Trigger Memory Fill ===
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|-
|-
| 1
| 1
| Buf0 start address (0 = don't fill anything)
| Buffer 0 start address
|-
|-
| 2
| 2
| Buf0 value
| Buffer 0 value
|-
|-
| 3
| 3
| Buf0 end address
| Buffer 0 end address
|-
|-
| 4
| 4
| Buf1 start address (0 = don't fill anything)
| Buffer 1 start address
|-
|-
| 5
| 5
| Buf1 value
| Buffer 1 value
|-
|-
| 6
| 6
| Buf1 end address
| Buffer 1 end address
|-
|-
| 7
| 7
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This command converts the specified addresses to physical addresses, then writes these addresses and the specified parameters to the [[GPU]] registers at 0x1EF00010 and 0x1EF00020. Doing so fills the specified buffers with the associated 4-byte value. This is used to clear GPU framebuffers.
This command sets the GPU [[GPU/External_Registers#Memory_Fill|Memory Fill registers]].
The associated buffer address must not be <= to the main buffer address, thus the associated buffer address must not be zero as well. When the bufX address is zero, processing for the bufX parameters is skipped.


The values of Control0 and Control1 give information about the type of memory fill. See [[GPU/External_Registers#Memory Fill|here]] for more information about memory fill parameters.
Addresses should be aligned to 8 bytes and must be in linear, QTM or VRAM memory, otherwise error 0xE0E02BF5 (GSP_INVALID_ADDRESS) is returned. The start address for a buffer must be < its end address, else the same error is returned. If the start address for a buffer is 0, that buffer is skipped; otherwise, its relative PSC unit is used for the fill operation.


=== Trigger Display Transfer ===
=== Trigger Display Transfer ===
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