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Configuration Memory: Difference between revisions

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== Registers ==
== Memory ==
{| class="wikitable" border="1"
{| class="wikitable" border="1"
!  NAME
!  NAME
!  PHYSICAL ADDRESS
!  PROCESS VIRTUAL ADDRESS
!  PROCESS VIRTUAL ADDRESS
!  KERNEL VIRTUAL ADDRESS
!  WIDTH
!  WIDTH
|-
|-
| REG_NSTID
| NSTID
| ?
| 0x1FF80008
| 0x1FF80008
| ?
| 8
| 8
|-
|-
| REG_SYSCOREVER
| SYSCOREVER
| ?
| 0x1FF80010
| 0x1FF80010
| ?
| 4
| 4
|-
|-
| REG_UNITINFO
| UNITINFO
| ?
| 0x1FF80014
| 0x1FF80014
| ?
| 1
| 1
|-
|-
| REG_MENUTID
| MENUTID
| ?
| 0x1FF810A0
| 0x1FF810A0
| ?
| 8
| 8
|-
|-
| REG_ACTIVEMENUTID
| ACTIVEMENUTID
| ?
| 0x1FF810A8
| 0x1FF810A8
| ?
| 8
| 8
|}
|}


All of these registers are initialized by the ARM11 kernel, except for REG_MENUTID and REG_ACTIVEMENUTID which are set by NS.
All of these fields are initialized by the ARM11 kernel, except for MENUTID and ACTIVEMENUTID which are set by NS.


=== REG_NSTID ===
=== NSTID ===
This register contains the titleID of the first title to launch after the core system processes loaded. If this register titleID is all-zero, the system will not attempt to launch the title. The regular ARM11 kernel sets this to the regular [[NS]] titleID, while the SAFE_MODE ARM11 kernel sets this to the SAFE_MODE NS titleID.
This field contains the titleID of the first title to launch after the core system processes loaded. The [[Process Manager Ports|PM]] module launches this title. If this field titleID is all-zero, the system will not attempt to launch the title. The regular ARM11 kernel sets this to the regular [[NS]] titleID, while the SAFE_MODE ARM11 kernel sets this to the SAFE_MODE NS titleID.


=== REG_SYSCOREVER ===
=== SYSCOREVER ===
When launching [[NCCH#CXI|CXIs]], this register value must match the core version field stored in the CXI exheader. If they do not match, the system will refuse to launch the ARM11 process. The regular ARM11 kernel sets this to 0x2, while the SAFE_MODE ARM11 kernel sets this to 0x3.
When launching [[NCCH#CXI|CXIs]], the value stored here must match the core version field stored in the CXI exheader. If they do not match, the [[Process Manager Ports|PM]] module will refuse to launch the ARM11 process. The regular ARM11 kernel sets this to 0x2, while the SAFE_MODE ARM11 kernel sets this to 0x3.


=== REG_UNITINFO ===
=== UNITINFO ===
{| class="wikitable" border="1"
{| class="wikitable" border="1"
!  Bit
!  Bit
Line 64: Line 52:
|}
|}


Normally this register is all-zero, however bit2 in this register is set by the ARM11 kernel when ARM debug CP14 DSCR bit14 is set. [[NS]] loads the menu TID from REG_MENUTID when bits 1-7 of this register are clear.
Normally this register is all-zero, however bit2 in this register is set by the ARM11 kernel when ARM debug CP14 DSCR bit14 is set. [[NS]] loads the menu TID from MENUTID when bits 1-7 of this register are clear.


=== REG_MENUTID ===
=== MENUTID ===
This contains the titleID of the retail menu which will be launched by [[NS]].
This contains the titleID of the retail menu which will be launched by [[NS]].


=== REG_ACTIVEMENUTID ===
=== ACTIVEMENUTID ===
This contains the titleID of the currently running menu launched by [[NS]]. Normally this is the home menu TID from REG_MENUTID, but if launching that fails this titleID is the [[NS#Alternate Menu|alternate menu]].(On debug units this is the TID loaded from [[Config Info Blocks|config]])
This contains the titleID of the currently running menu launched by [[NS]]. Normally this is the home menu TID from MENUTID, but if launching that fails this titleID is the [[NS#Alternate Menu|alternate menu]].(On debug units this is the TID loaded from [[Config Info Blocks|config]])
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