SPI Registers: Difference between revisions

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== Registers ==
= Registers =
{| class="wikitable" border="1"
{| class="wikitable" border="1"
NAME
Old3DS
PHYSICAL ADDRESS
Name
PROCESS VIRTUAL ADDRESS
Address
KERNEL VIRTUAL ADDRESS
Width
WIDTH
Used by
|-
|-
| REG_SPI2CNT
| style="background: green" | Yes
| [[#SPI_CNT|SPI_CNT]]0
| 0x10142000
| 2
|
|-
| style="background: green" | Yes
| SPI_DATA0
| 0x10142002
| 1
|
|-
| style="background: green" | Yes
| [[#SPI_CNT|SPI_CNT]]1
| 0x10143000
| 2
|
|-
| style="background: green" | Yes
| SPI_DATA1
| 0x10143002
| 1
|
|-
| style="background: green" | Yes
| [[#SPI_CNT|SPI_CNT]]2
| 0x10160000
| 0x10160000
| 0x1EC60000
|
| 2
| 2
|
|-
|-
| REG_SPI2DATA
| style="background: green" | Yes
| SPI_DATA2
| 0x10160002
| 0x10160002
| 0x1EC60002
| 1
|
|
| 1
|}
|}


 
== SPI_CNT ==
These SPI registers are similar to the SPI registers on DS.
{| class="wikitable" border="1"
!  Old3DS
!  Name
|-
| 0-1
| Baudrate (0=4MHz/Firmware, 1=2MHz/Touchscr, 2=1MHz/Powerman., 3=512KHz)
|-
| 2-6
| Not used            (Zero)
|-
| 7
| Busy Flag          (0=Ready, 1=Busy) (presumably Read-only)
|-
| 8-9
| Device Select      (0-3)
|-
| 10
| Transfer Size      (0=8bit/Normal, 1=16bit/Bugged)
|-
| 11
| Chipselect Hold    (0=Deselect after transfer, 1=Keep selected)
|-
| 12-13
| Not used            (Zero)
|-
| 14
| Interrupt Request  (0=Disable, 1=Enable)
|-
| 15
| SPI Bus Enable      (0=Disable, 1=Enable)
|}

Revision as of 17:40, 20 March 2015

Registers

Old3DS Name Address Width Used by
Yes SPI_CNT0 0x10142000 2
Yes SPI_DATA0 0x10142002 1
Yes SPI_CNT1 0x10143000 2
Yes SPI_DATA1 0x10143002 1
Yes SPI_CNT2 0x10160000 2
Yes SPI_DATA2 0x10160002 1

SPI_CNT

Old3DS Name
0-1 Baudrate (0=4MHz/Firmware, 1=2MHz/Touchscr, 2=1MHz/Powerman., 3=512KHz)
2-6 Not used (Zero)
7 Busy Flag (0=Ready, 1=Busy) (presumably Read-only)
8-9 Device Select (0-3)
10 Transfer Size (0=8bit/Normal, 1=16bit/Bugged)
11 Chipselect Hold (0=Deselect after transfer, 1=Keep selected)
12-13 Not used (Zero)
14 Interrupt Request (0=Disable, 1=Enable)
15 SPI Bus Enable (0=Disable, 1=Enable)