SVC: Difference between revisions
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struct DmaConfig { | struct DmaConfig { | ||
sint8_t channel_sel; // @0 Selects which DMA channel to use: 0-7, -1 = don't care. | sint8_t channel_sel; // @0 Selects which DMA channel to use: 0-7, -1 = don't care. | ||
uint8_t | uint8_t endian_swap_size; // @1 Accepted values: 0=none,2=16bit,4=32bit,8=64bit. | ||
uint8_t flags; // @2 bit0: DST_CFG, bit1: SRC_CFG, bit2: SHALL_BLOCK, bit3: ???, bit6: DST_ALT_CFG, bit7: SRC_ALT_CFG | uint8_t flags; // @2 bit0: DST_CFG, bit1: SRC_CFG, bit2: SHALL_BLOCK, bit3: ???, bit6: DST_ALT_CFG, bit7: SRC_ALT_CFG | ||
uint8_t | uint8_t padding; | ||
uint8_t dst_cfg[10]; | uint8_t dst_cfg[10]; | ||
// @5 Accepted values (u8): 4, 8, 12, 15. | // @5 Accepted values (u8): 4, 8, 12, 15. | ||
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Each src/dst config: | Each src/dst config: | ||
struct DmaSubConfig { | struct DmaSubConfig { | ||
uint8_t | uint8_t peripheral_id; // @0 | ||
uint8_t unk2; // @1 Seen: 2 | uint8_t unk2; // @1 Seen: 2 | ||
uint16_t unk3; // @2 | uint16_t unk3; // @2 | ||
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uint16_t unk5; // @8 | uint16_t unk5; // @8 | ||
} | } | ||
The generated bytecode starts with a FLUSHP on the peripheral_ids for src/dst (if specified). After that, it always moves 0 into DAR. Then it moves the src/dst addresses into SAR/DAR respectively... | |||
= Debugging = | = Debugging = | ||