GPU/Internal Registers: Difference between revisions
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| [[#GPUREG_FINALIZE|GPUREG_FINALIZE]] | | [[#GPUREG_FINALIZE|GPUREG_FINALIZE]] | ||
| | | | ||
| | |PICA_REG_INTERRUPT | ||
|- | |- | ||
| 0011 | | 0011 | ||
| Line 534: | Line 534: | ||
| [[#GPUREG_0063|GPUREG_0063]] | | [[#GPUREG_0063|GPUREG_0063]] | ||
| | | | ||
| | |PICA_REG_EARLY_DEPTH_CLEAR | ||
|- | |- | ||
| 0064 | | 0064 | ||
| Line 2,116: | Line 2,116: | ||
| [[#GPUREG_LIGHTx_ATTENUATION_BIAS|GPUREG_LIGHT5_ATTENUATION_BIAS]] | | [[#GPUREG_LIGHTx_ATTENUATION_BIAS|GPUREG_LIGHT5_ATTENUATION_BIAS]] | ||
| | | | ||
| | |PICA_REG_FRAG_LIGHT5_DIST_ATTN_BIAS | ||
|- | |- | ||
| 019B | | 019B | ||
| [[#GPUREG_LIGHTx_ATTENUATION_SCALE|GPUREG_LIGHT5_ATTENUATION_SCALE]] | | [[#GPUREG_LIGHTx_ATTENUATION_SCALE|GPUREG_LIGHT5_ATTENUATION_SCALE]] | ||
| | | | ||
| | |PICA_REG_FRAG_LIGHT5_DIST_ATTN_SCALE | ||
|- | |- | ||
| 019C | | 019C | ||
| Line 2,196: | Line 2,196: | ||
| [[#GPUREG_LIGHTx_ATTENUATION_BIAS|GPUREG_LIGHT6_ATTENUATION_BIAS]] | | [[#GPUREG_LIGHTx_ATTENUATION_BIAS|GPUREG_LIGHT6_ATTENUATION_BIAS]] | ||
| | | | ||
| | |PICA_REG_FRAG_LIGHT6_DIST_ATTN_BIAS | ||
|- | |- | ||
| 01AB | | 01AB | ||
| [[#GPUREG_LIGHTx_ATTENUATION_SCALE|GPUREG_LIGHT6_ATTENUATION_SCALE]] | | [[#GPUREG_LIGHTx_ATTENUATION_SCALE|GPUREG_LIGHT6_ATTENUATION_SCALE]] | ||
| | | | ||
| | |PICA_REG_FRAG_LIGHT6_DIST_ATTN_SCALE | ||
|- | |- | ||
| 01AC | | 01AC | ||
| Line 2,276: | Line 2,276: | ||
| [[#GPUREG_LIGHTx_ATTENUATION_BIAS|GPUREG_LIGHT7_ATTENUATION_BIAS]] | | [[#GPUREG_LIGHTx_ATTENUATION_BIAS|GPUREG_LIGHT7_ATTENUATION_BIAS]] | ||
| | | | ||
| | |PICA_REG_FRAG_LIGHT7_DIST_ATTN_BIAS | ||
|- | |- | ||
| 01BB | | 01BB | ||
| [[#GPUREG_LIGHTx_ATTENUATION_SCALE|GPUREG_LIGHT7_ATTENUATION_SCALE]] | | [[#GPUREG_LIGHTx_ATTENUATION_SCALE|GPUREG_LIGHT7_ATTENUATION_SCALE]] | ||
| | | | ||
| | |PICA_REG_FRAG_LIGHT7_DIST_ATTN_SCALE | ||
|- | |- | ||
| 01BC | | 01BC | ||
| Line 2,860: | Line 2,860: | ||
| [[#GPUREG_022D|GPUREG_022D]] | | [[#GPUREG_022D|GPUREG_022D]] | ||
| | | | ||
| | |PICA_REG_POST_VERTEX_CACHE_NUM | ||
|- | |- | ||
| 022E | | 022E | ||
| Line 2,915: | Line 2,915: | ||
| [[#GPUREG_CMDBUF_SIZE0|GPUREG_CMDBUF_SIZE0]] | | [[#GPUREG_CMDBUF_SIZE0|GPUREG_CMDBUF_SIZE0]] | ||
| | | | ||
| | |PICA_REG_COMMAND_BUF_SIZE_CH0 | ||
|- | |- | ||
| 0239 | | 0239 | ||
| [[#GPUREG_CMDBUF_SIZE1|GPUREG_CMDBUF_SIZE1]] | | [[#GPUREG_CMDBUF_SIZE1|GPUREG_CMDBUF_SIZE1]] | ||
| | | | ||
| | |PICA_REG_COMMAND_BUF_SIZE_CH1 | ||
|- | |- | ||
| 023A | | 023A | ||
| [[#GPUREG_CMDBUF_ADDR0|GPUREG_CMDBUF_ADDR0]] | | [[#GPUREG_CMDBUF_ADDR0|GPUREG_CMDBUF_ADDR0]] | ||
| | | | ||
| | |PICA_REG_COMMAND_BUF_ADDR_CH0 | ||
|- | |- | ||
| 023B | | 023B | ||
| [[#GPUREG_CMDBUF_ADDR1|GPUREG_CMDBUF_ADDR1]] | | [[#GPUREG_CMDBUF_ADDR1|GPUREG_CMDBUF_ADDR1]] | ||
| | | | ||
| | |PICA_REG_COMMAND_BUF_ADDR_CH1 | ||
|- | |- | ||
| 023C | | 023C | ||
| [[#GPUREG_CMDBUF_JUMP0|GPUREG_CMDBUF_JUMP0]] | | [[#GPUREG_CMDBUF_JUMP0|GPUREG_CMDBUF_JUMP0]] | ||
| | | | ||
| | |PICA_REG_COMMAND_BUF_KICK_CH0 | ||
|- | |- | ||
| 023D | | 023D | ||
| [[#GPUREG_CMDBUF_JUMP1|GPUREG_CMDBUF_JUMP1]] | | [[#GPUREG_CMDBUF_JUMP1|GPUREG_CMDBUF_JUMP1]] | ||
| | | | ||
| | |PICA_REG_COMMAND_BUF_KICK_CH1 | ||
|- | |- | ||
| 023E | | 023E | ||
| Line 3,105: | Line 3,105: | ||
| [[#GPUREG_PRIMITIVE_CONFIG|GPUREG_PRIMITIVE_CONFIG]] | | [[#GPUREG_PRIMITIVE_CONFIG|GPUREG_PRIMITIVE_CONFIG]] | ||
| ? | | ? | ||
|PICA_REG_GS_OUT_REG_NUM3 / PICA_REG_VS_OUT_REG_NUM3 | |PICA_REG_GS_OUT_REG_NUM3 / PICA_REG_DRAW_MODE2 / PICA_REG_VS_OUT_REG_NUM3 | ||
|- | |- | ||
| 025F | | 025F | ||