GPU/Internal Registers: Difference between revisions
→GPUREG_TEXUNIT3_PROCTEX4: document LOD configuration based on hardware test |
→GPUREG_TEXUNIT3_PROCTEX5: Document more proctex mipmap configuration based on hardware test |
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| Line 5,040: | Line 5,040: | ||
|- | |- | ||
| 0-7 | | 0-7 | ||
| unsigned, Texture offset | | unsigned, Texture offset (Mipmap level 0 / base level) | ||
|- | |- | ||
| 8-31 | | 8-15 | ||
| | | unsigned, mipmap level 1 offset (usually 0x80) | ||
|- | |||
| 16-23 | |||
| unsigned, mipmap level 2 offset (usually 0xC0) | |||
|- | |||
| 24-31 | |||
| unsigned, mipmap level 3 offset (usually 0xE0) | |||
|- | |||
| | |||
| Note: mipmap level 4-7 seems to be hardcoded at offset 0xF0, 0xF8, 0xFC and 0xFE | |||
|} | |} | ||