CONFIG11 Registers: Difference between revisions
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Add CFG11_GPU_N3DS_CNT |
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|-style="border-top: double" | |-style="border-top: double" | ||
| style="background: red" | No | | style="background: red" | No | ||
| | | [[#CFG11_GPU_N3DS_CNT|CFG11_GPU_N3DS_CNT]] | ||
| 0x10140400 | | 0x10140400 | ||
| 1 | | 1 | ||
| Line 174: | Line 174: | ||
| Enable [[SPI Registers]] 0x10143800. | | Enable [[SPI Registers]] 0x10143800. | ||
|} | |} | ||
== CFG11_GPU_N3DS_CNT == | |||
{| class="wikitable" border="1" | |||
! Bit | |||
! Description | |||
|- | |||
| 0 | |||
| Enable N3DS mode? (enables access to the extra N3DS FCRAM banks, etc.) | |||
|- | |||
| 1 | |||
| Texture related? (observing texture glitches when disabling this bit) | |||
|} | |||
New3DS Kernel11 writes both bits very early during init. | |||
== CFG11_BOOTROM_OVERLAY_CNT == | == CFG11_BOOTROM_OVERLAY_CNT == | ||