GSP Shared Memory: Difference between revisions
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The Interrupt info structure is located at sharedmemvadr + process_gsp_index*0x40. | The Interrupt info structure is located at sharedmemvadr + process_gsp_index*0x40. | ||
It | It's a list of interrupts. | ||
{| class="wikitable" border="1" | {| class="wikitable" border="1" | ||
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|- | |- | ||
| 0x0 | | 0x0 | ||
| Index of the last processed data | | Index of the last processed data (must be updated manually) | ||
|- | |- | ||
| 0x1 | | 0x1 | ||
| | | Count (max 0x1F for PDC, 0x33 for others) | ||
|- | |- | ||
| 0x2 | | 0x2 | ||
| | | Missed other interrupts (set to 1 when 0 and count > 0x33) | ||
|- | |- | ||
| 0x3 | | 0x3 | ||
| | | Flags (bit0 = skip PDC) | ||
|- | |- | ||
| 0x4-0x7 | | 0x4-0x7 | ||
| | | Missed PDC0 (incremented when flags.bit0 is clear and count > 0x1F) | ||
|- | |- | ||
| 0x8-0xB | | 0x8-0xB | ||
| | | Missed PDC1 (same as above) | ||
|- | |- | ||
| 0xC-0x3F | | 0xC-0x3F | ||
| u8 | | Interrupt list (u8) (0=PSC0, 1=PSC1, 2=PDC0/VBlankTop, 3=PDC1/VBlankBottom, 4=PPF, 5=P3D, 6=DMA) | ||
|} | |} | ||
PDC interrupts are sent to all processes; other interrupts are only sent to the process with GPU rights. | |||
=Framebuffer info= | =Framebuffer info= |