Memory layout: Difference between revisions
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| 0x1EC00000 | | 0x1EC00000 | ||
| 0x10100000 | | 0x10100000 | ||
| | | 0x01000000 | ||
| [[IO]] registers, the mapped IO pages which each process can access is specified in the [[NCCH#CXI|CXI]] exheader.(Applications normally don't have access to registers in this range) | | [[IO]] registers, the mapped IO pages which each process can access is specified in the [[NCCH#CXI|CXI]] exheader.(Applications normally don't have access to registers in this range) | ||
|- | |||
| 0x1F000000 | |||
| 0x18000000 | |||
| 0x00600000 | |||
| VRAM? Access to this is specified by the exheader. | |||
|- | |||
| 0x1FF00000 | |||
| 0x1FF00000 | |||
| 0x00080000 | |||
| DSP memory, access to this is specified by the exheader. | |||
|- | |- | ||
| 0x1FF80000 | | 0x1FF80000 | ||