GPU/External Registers: Difference between revisions
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| 0x1EF00C00 | | 0x1EF00C00 | ||
| Input framebuffer physical address>>3 | | Input GPU framebuffer physical address>>3 | ||
|- | |- | ||
| 0x1EF00C04 | | 0x1EF00C04 | ||
| Output framebuffer physical address>>3 | | Output LCD framebuffer physical address>>3 | ||
|- | |- | ||
| 0x1EF00C08 | | 0x1EF00C08 | ||
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|} | |} | ||
These registers are used by [[GSP_Shared_Memory|GX command]] 3 and 4. For cmd4, *0x1EF00C18 |= 1 is used instead of just writing value 1. The dimensions fields seem to use the same format as [[LCD]] register 0x1EF00X5C. | These registers are used by [[GSP_Shared_Memory|GX command]] 3 and 4. For cmd4, *0x1EF00C18 |= 1 is used instead of just writing value 1. The dimensions fields seem to use the same format as [[LCD]] register 0x1EF00X5C. The input framebuffer width for the main screen is normally 480. | ||
=== 0x1EF00C10 === | === 0x1EF00C10 === | ||
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! Description | ! Description | ||
|- | |- | ||
| | | 3-0 | ||
| ? | | ? | ||
|- | |||
| 4 | |||
| Unknown, this is set when 3D stereoscopy is enabled, zero otherwise.(Bit24 is normally clear when this bit is set) | |||
|- | |||
| 11-5 | |||
|- | |- | ||
| 12 | | 12 | ||
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|- | |- | ||
| 24 | | 24 | ||
| When this is set, the actual framebuffer width is | | When this is set, the actual output framebuffer width is width>>1. | ||
|- | |- | ||
| 31-25 | | 31-25 | ||
| ? | | ? | ||
|} | |} | ||