SVC: Difference between revisions
| Line 563: | Line 563: | ||
Handle* thread=R1 | Handle* thread=R1 | ||
This processorid is a bitmask for which processors the thread can be run on. Bit value zero enables thread execution for this CPUID, bit value one disables thread execution for this CPUID. Bit0-bit1 are for CPUID0-CPUID1. | This processorid is a bitmask for which processors the thread can be run on. Bit value zero enables thread execution for this CPUID, bit value one disables thread execution for this CPUID. Bit0-bit1 are for CPUID0-CPUID1. The s32 processorid must be <=2. The thread priority value must be in the following range: 0x0..0x3F. | ||
The stacktop must be aligned to 0x8-bytes, otherwise when not aligned to 0x8-bytes the ARM11 kernel clears the low 3-bits of the stacktop address. | The stacktop must be aligned to 0x8-bytes, otherwise when not aligned to 0x8-bytes the ARM11 kernel clears the low 3-bits of the stacktop address. | ||