Difference between revisions of "ARM11 Interrupts"
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| 0x6 | | 0x6 | ||
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| MPCore software-interrupt. | | MPCore software-interrupt. | ||
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| 0x8 | | 0x8 | ||
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| MPCore software-interrupt. Used for scheduling. | | MPCore software-interrupt. Used for scheduling. | ||
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| 0x1D | | 0x1D | ||
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| MPCore timer. | | MPCore timer. | ||
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| 0x1E | | 0x1E | ||
| − | | | + | | Kernel |
| MPCore watchdog. | | MPCore watchdog. | ||
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| 0x30 | | 0x30 | ||
| − | | | + | | Kernel |
| ? | | ? | ||
|- | |- | ||
| 0x39 | | 0x39 | ||
| − | | | + | | Kernel |
| DMA | | DMA | ||
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| 0x3A | | 0x3A | ||
| − | | | + | | Kernel |
| DMA | | DMA | ||
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| 0x57 | | 0x57 | ||
| spi, TwlBg | | spi, TwlBg | ||
| + | | ? | ||
| + | |- | ||
| + | | 0x58 | ||
| + | | Kernel | ||
| ? | | ? | ||
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Revision as of 06:29, 22 August 2015
Interrupts
Interrupt priority is 0-0xF
Private Interrupts
Each CPU core has 32 software interrupts that are private and belong to that core. These interrupts are numbers 0-0x1F for each core. The hardware interrupts are not core-specific and start at interrupt ID 0x20.
| IRQ | Listener | Description |
|---|---|---|
| 0-0x5 | MPCore software-interrupt. | |
| 0x6 | Kernel | MPCore software-interrupt. |
| 0x7 | MPCore software-interrupt. | |
| 0x8 | Kernel | MPCore software-interrupt. Used for scheduling. |
| 0x9-0xF | MPCore software-interrupt. | |
| 0x1D | Kernel | MPCore timer. |
| 0x1E | Kernel | MPCore watchdog. |
Hardware Interrupts
There are 0x60 hardware interrupts starting at 0x20 and continuing up to 0x7F. These are not private and are accessible from any core.
| IRQ | Listener | Description |
|---|---|---|
| 0x28 | gsp, TwlBg | ? |
| 0x29 | gsp, TwlBg | ? |
| 0x2A | gsp, TwlBg | ? |
| 0x2B | gsp, TwlBg | ? |
| 0x2C | gsp, TwlBg | ? |
| 0x2D | gsp, TwlBg | ? |
| 0x30 | Kernel | ? |
| 0x39 | Kernel | DMA |
| 0x3A | Kernel | DMA |
| 0x40 | nwm | ? |
| 0x41 | nwm | ? |
| 0x45 | mvd (New3DS) | ? |
| 0x46 | mvd (New3DS) | ? |
| 0x48 | camera | ? |
| 0x49 | camera | ? |
| 0x4A | dsp | ? |
| 0x4B | camera | Y2R Conversion Finished |
| 0x4C | TwlBg | ? |
| 0x4D | TwlBg | ? |
| 0x4E | mvd (New3DS) | ? |
| 0x4F | mvd (New3DS) | ? |
| 0x50 | pxi, TwlBg | ? |
| 0x51 | pxi, TwlBg | ? |
| 0x52 | pxi, TwlBg | Send Fifo Empty |
| 0x53 | pxi, TwlBg | Receive Fifo Not Empty |
| 0x54 | i2c, TwlBg | ? |
| 0x55 | i2c, TwlBg | ? |
| 0x56 | spi, TwlBg | ? |
| 0x57 | spi, TwlBg | ? |
| 0x58 | Kernel | ? |
| 0x59 | TwlBg | ? |
| 0x5A | mic | ? |
| 0x5C | i2c, TwlBg | ? |
| 0x60 | gpio, TwlBg | ? |
| 0x62 | gpio, TwlBg | ? |
| 0x63 | gpio, TwlBg | ? |
| 0x64 | gpio, TwlBg | ? |
| 0x66 | gpio, TwlBg | ? |
| 0x68 | gpio, TwlBg | ? |
| 0x69 | gpio, TwlBg | ? |
| 0x6A | gpio, TwlBg | ? |
| 0x6B | gpio, TwlBg | ? |
| 0x6C | gpio, TwlBg | ? |
| 0x6D | gpio, TwlBg | ? |
| 0x6E | gpio, TwlBg | ? |
| 0x6F | gpio, TwlBg | ? |
| 0x70 | gpio, TwlBg | ? |
| 0x71 | gpio, TwlBg | ? |
| 0x72 | gpio, TwlBg | ? |
| 0x73 | TwlBg | ? |
There are 2 tables in the ARM11 kernel: the first has 32 * 2(or 32 * 4) 8-byte entries. This table is for the private interrupts that belong to each core. The data for each interrupt can be found by doing table_base + (core_num * 0x100) + (intr_num * 8). The second table is for public hardware interrupts and the data for each interrupt can be retrieved by doing table_base + (intr_num * 8).