Difference between revisions of "CONFIG11 Registers"

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!  Width
 
!  Width
 
!  Used by
 
!  Used by
−
|-
 
−
| style="background: green" | Yes
 
−
| [[#PDN_SPI_CNT|PDN_SPI_CNT]]
 
−
| 0x101401C0
 
−
| 4
 
−
| [[SPI Services]]
 
 
|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
 
| [[#PDN_SHAREDWRAM_32K_DATA|PDN_SHAREDWRAM_32K_DATA]]<0-7>
 
| [[#PDN_SHAREDWRAM_32K_DATA|PDN_SHAREDWRAM_32K_DATA]]<0-7>
−
| 0x10141000
+
| 0x10140000
 
| 1*8
 
| 1*8
−
|  
+
| Boot11, Process9, [[DSP Services]]
 
|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
 
| [[#PDN_SHAREDWRAM_32K_CODE|PDN_SHAREDWRAM_32K_CODE]]<0-7>
 
| [[#PDN_SHAREDWRAM_32K_CODE|PDN_SHAREDWRAM_32K_CODE]]<0-7>
−
| 0x10141008
+
| 0x10140008
 
| 1*8
 
| 1*8
−
|  
+
| Boot11, Process9, [[DSP Services]]
 
|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| ?
+
| [[#PDN_SPI_CNT|PDN_SPI_CNT]]
−
| 0x10141100
+
| 0x101401C0
−
| 1
+
| 4
−
|
+
| [[SPI Services]]
 
|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| ?
+
| ARM11 interrupt related.
−
| 0x10141103
+
| 0x10140104
 
| 1
 
| 1
−
|
+
| Kernel11.
−
|-
+
|-style="border-top: double"
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| ?
+
| PDN_GPU_STATUS?
−
| 0x10141104
+
| 0x10141000
−
| 1
 
−
|
 
−
|-
 
−
| style="background: green" | Yes
 
−
| ?
 
−
| 0x10141105
 
−
| 1
 
−
|
 
−
|-
 
−
| style="background: green" | Yes
 
−
| ?
 
−
| 0x10141108
 
−
| 1
 
−
|
 
−
|-
 
−
| style="background: green" | Yes
 
−
| PDN_WIFI?
 
−
| 0x1014110C
 
−
| 1
 
−
|
 
−
|-
 
−
| style="background: green" | Yes
 
−
| ?
 
−
| 0x10141140
 
−
| 1
 
−
|
 
−
|-
 
−
| style="background: green" | Yes
 
−
| ?
 
−
| 0x10141141
 
−
| 1
 
−
|
 
−
|-
 
−
| style="background: green" | Yes
 
−
| [[#PDN_WIFI_CNT|PDN_WIFI_CNT]]
 
−
| 0x10141180
 
−
| 1
 
−
|
 
−
|-
 
−
| style="background: green" | Yes
 
−
| [[#PDN_HID_CNT|PDN_HID_CNT]]
 
−
| 0x101411C0
 
−
| 1
 
−
|
 
−
|-
 
−
| style="background: green" | Yes
 
−
| ?
 
−
| 0x10141200
 
 
| 4
 
| 4
−
|
+
| Kernel11
−
|-
 
−
| style="background: green" | Yes
 
−
| ?
 
−
| 0x10141FFC
 
−
| 4
 
−
|
 
 
|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
Line 108: Line 48:
 
| 4
 
| 4
 
| [[PTM Services]]
 
| [[PTM Services]]
−
|-
+
|-style="border-top: double"
 
| style="background: green" | Yes
 
| style="background: green" | Yes
 
| [[#PDN_TWLMODE|PDN_TWLMODE]]
 
| [[#PDN_TWLMODE|PDN_TWLMODE]]
Line 119: Line 59:
 
| 0x10141104
 
| 0x10141104
 
| 2
 
| 2
 +
|
 +
|-
 +
| style="background: green" | Yes
 +
| PDN_WIFI?
 +
| 0x1014110C
 +
| 1
 
|
 
|
 
|-
 
|-
Line 146: Line 92:
 
|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| [[#PDN_LCD_CNT|PDN_LCD_CNT]]
+
| [[#PDN_WIFI_CNT|PDN_WIFI_CNT]]
−
| 0x10141200
+
| 0x10141180
 
| 1
 
| 1
−
| Boot11 sets/clears bit16, bit0.
+
|
 
|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| [[#PDN_BACKLIGHT_CNT|PDN_BACKLIGHT_CNT]]
+
| [[#PDN_HID_CNT|PDN_HID_CNT]]
−
| 0x10141202
+
| 0x101411C0
 
| 1
 
| 1
 
|
 
|
 +
|-style="border-top: double"
 +
| style="background: green" | Yes
 +
| [[#PDN_GPU_CNT|PDN_GPU_CNT]]
 +
| 0x10141200
 +
| 4
 +
| Boot11, Kernel11
 
|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| ?
+
| [[#PDN_GPU_CNT2|PDN_GPU_CNT2]]
 
| 0x10141204
 
| 0x10141204
−
| 1
+
| 4
−
| Boot11 sets/clears bit0.
+
| Boot11, Kernel11
 
|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| ?
+
| PDN_GPU_CNT3
 
| 0x10141210
 
| 0x10141210
−
| 1
+
| 2
−
|
+
| Kernel11
 
|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
Line 173: Line 125:
 
| 0x10141220
 
| 0x10141220
 
| 1
 
| 1
−
|
+
| Boot11
 
|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
Line 182: Line 134:
 
|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| ?
+
| SharedWram/DSP related.
 
| 0x10141230
 
| 0x10141230
 
| 1
 
| 1
 +
| Process9
 +
|-style="border-top: double"
 +
| style="background: green" | Yes
 +
| ?
 +
| 0x10141FFC
 +
| 4
 
|
 
|
 
|}
 
|}
Line 254: Line 212:
 
Writing 0x8000 to here from the ARM9 with NATIVE_FIRM running doesn't seem to do anything, other reg-pokes likely need done first.
 
Writing 0x8000 to here from the ARM9 with NATIVE_FIRM running doesn't seem to do anything, other reg-pokes likely need done first.
  
−
==PDN_LCD_CNT==
+
==PDN_GPU_CNT==
−
This one seems to control the LCD displays?
+
This one seems to control the LCD/GPU/Backlight.
 +
 
 +
Bit0: Enable GPU registers at 0x10400000+.
 +
Bit16: Turn on LCD backlight.
 +
 
 +
==PDN_GPU_CNT2==
 +
Bit0: Power on GPU?
  
 
==PDN_BACKLIGHT_CNT==
 
==PDN_BACKLIGHT_CNT==

Revision as of 00:08, 22 March 2015

Registers

Old3DS Name Address Width Used by
Yes PDN_SHAREDWRAM_32K_DATA<0-7> 0x10140000 1*8 Boot11, Process9, DSP Services
Yes PDN_SHAREDWRAM_32K_CODE<0-7> 0x10140008 1*8 Boot11, Process9, DSP Services
Yes PDN_SPI_CNT 0x101401C0 4 SPI Services
Yes ARM11 interrupt related. 0x10140104 1 Kernel11.
Yes PDN_GPU_STATUS? 0x10141000 4 Kernel11
Yes PDN_PTM_0 0x10141008 4 PTM Services
Yes PDN_PTM_1 0x1014100C 4 PTM Services
Yes PDN_TWLMODE 0x10141100 2
Yes ? 0x10141104 2
Yes PDN_WIFI? 0x1014110C 1
Yes ? 0x10141110 2
Yes ? 0x10141112 2
Yes PDN_CODEC_0 0x10141114 2 CODEC Services
Yes PDN_CODEC_1 0x10141116 2 CODEC Services
Yes PDN_WIFI_CNT 0x10141180 1
Yes PDN_HID_CNT 0x101411C0 1
Yes PDN_GPU_CNT 0x10141200 4 Boot11, Kernel11
Yes PDN_GPU_CNT2 0x10141204 4 Boot11, Kernel11
Yes PDN_GPU_CNT3 0x10141210 2 Kernel11
Yes PDN_CODEC_CNT 0x10141220 1 Boot11
Yes PDN_CAMERA_CNT 0x10141224 1
Yes SharedWram/DSP related. 0x10141230 1 Process9
Yes ? 0x10141FFC 4

PDN_SPI_CNT

Bit Description
0 Enable SPI Registers 0x10160000.
1 Enable SPI Registers 0x10142000.
2 Enable SPI Registers 0x10143800.

PDN_SHAREDWRAM_32K_DATA

Used for mapping 32K chunks of shared WRAM for DSP data.

Bits Description
0-1 Master (0=ARM9?, 1=ARM11?, 2 or 3=DSP/data)
2-4 Offset (0..7) (slot 0..7) (LSB of address in 32Kbyte units)
5-6 Not used (0)
7 Enable (0=Disable, 1=Enable)

PDN_SHAREDWRAM_32K_CODE

Used for mapping 32K chunks of shared WRAM for DSP data.

Bits Description
0-1 Master (0=ARM9?, 1=ARM11?, 2 or 3=DSP/code)
2-4 Offset (0..7) (slot 0..7) (LSB of address in 32Kbyte units)
5-6 Not used (0)
7 Enable (0=Disable, 1=Enable)

PDN_WIFI_CNT

Bit0: Enable wifi.

PDN_HID_CNT

Bit0: Enable HID Registers.

PDN_TWLMODE

The very last 3DS-mode register poke the TWL_FIRM Process9 does before it gets switched into TWL-mode, is writing 0x8000 to this register. Before writing this register, TWL Process9 waits for the value of this register to become non-zero. The Process9 code for this runs from ITCM, since switching into TWL-mode includes remapping all ARM9 physical memory.

Writing 0x8000 to here from the ARM9 with NATIVE_FIRM running doesn't seem to do anything, other reg-pokes likely need done first.

PDN_GPU_CNT

This one seems to control the LCD/GPU/Backlight.

Bit0: Enable GPU registers at 0x10400000+. Bit16: Turn on LCD backlight.

PDN_GPU_CNT2

Bit0: Power on GPU?

PDN_BACKLIGHT_CNT

This is the power register used for the LCD backlights.

bit0 = turn on/off LCD backlight, rest = always 0.

PDN_CODEC

The following is the only time the ARM11 CODEC module uses any 0x1EC41XXX registers. In one case CODEC module clears bit1 in register 0x1EC41114, in the other case CODEC module sets bit1 in registers 0x1EC41114 and 0x1EC41116.

PDN_CODEC_CNT

This is the power register used for the PDN CODEC service.

bit0 = unknown, bit1 = turn on/off DSP, rest = always 0.

PDN_CAMERA_CNT

This is the power register used for the PDN camera service.

bit0 = unknown, bit1 = turn on/off cameras, rest = always 0.

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