215
edits
Changes
mLine 147:
Line 147: − + − 10 < 14 <= 60.LO <= 04 <= 60.HI <= 08 <= 0C + − 18 <= 60.LO + Line 160:
Line 160: − +
Add hexadecimal prefix, and clarify relation meaning
All pixel and scanline timing values are 12bits, unless noted. This also applies to those fields where two u16 are combined into one register. Each u16 field is only 12bits in size. timin
All pixel and scanline timing values are 12bits, unless noted. This also applies to those fields where two u16 are combined into one register. Each u16 field is only 12bits in size. timin
The horizontal timing parameter order is as follows:
The horizontal timing parameter order is as follows (values may overflow through xTotal register value):
0x10 < 0x14 <= 0x60.LO <= 0x04 <= 0x60.HI <= 0x08 <= 0x0C <= 0x10
0x18 <= 0x60.LO
Timing starts from HCount == 0, then each absolute value in the beforementioned register chain triggers when HCount == register, latching the primitive display controller into a new mode.
Timing starts from HCount == 0, then each absolute value in the beforementioned register chain triggers when HCount == register, latching the primitive display controller into a new mode.
- Image start (pixel data is being DMA'd from video memory or main RAM)
- Image start (pixel data is being DMA'd from video memory or main RAM)
- Right border start/Image end (border color is being displayed after the main image)
- Right border start/Image end (border color is being displayed after the main image)
- Front porch (68 clock min, otherwise the screenn doesn't sync properly, and really glitches out)
- Front porch (68 clock min, otherwise the screen doesn't sync properly, and really glitches out)
- Unknown synchronization/blanking (unknown where it happens)
- Unknown synchronization/blanking (unknown where it happens)