GPU/Pitfalls: Difference between revisions

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=== Vertex attribute alignment ===

Vertex components which are defined through [[GPU/Internal_Registers#GPUREG_ATTRIBBUFFERi_CONFIG1|GPUREG_ATTRIBBUFFERi_CONFIG1]] will be aligned.

Vertex components which are defined through [[GPU/Internal_Registers#GPUREG_ATTRIBBUFFERi_CONFIG1|GPUREG_ATTRIBBUFFERi_CONFIG1]] will be accessed aligned by the GPU.

* Vertex attributes will be aligned to their component element size.

* Padding attributes (Component type > 11) will always aligned to 4 byte offets into the buffer.

* The stride which is passed to the GPU should be passed unaligned.

=== Vertex stride in GPUREG_ATTRIBBUFFERi_CONFIG2 ===

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=== Output mapping in GPUREG_SH_OUTMAP_MASK ===

The output ~~mapping~~ in [[GPU/Internal_Registers#GPUREG_SH_OUTMAP_MASK|GPUREG_SH_OUTMAP_MASK]] ~~configures~~ how the registers starting at [[GPU/Internal_Registers#GPUREG_SH_OUTMAP_Oi|GPUREG_SH_OUTMAP_Oi]] ~~will~~ map ~~the~~ outputs in the shader.

The output masking in [[GPU/Internal_Registers#GPUREG_SH_OUTMAP_MASK|GPUREG_SH_OUTMAP_MASK]] influences how the registers starting at [[GPU/Internal_Registers#GPUREG_SH_OUTMAP_Oi|GPUREG_SH_OUTMAP_Oi]] map to outputs in the shader.

If an output is disabled in [[GPU/Internal_Registers#GPUREG_SH_OUTMAP_MASK|GPUREG_SH_OUTMAP_MASK]] it means that no slot in the [[GPU/Internal_Registers#GPUREG_SH_OUTMAP_Oi|GPUREG_SH_OUTMAP_Oi]] registers is consumed.

[[GPU/Internal_Registers#GPUREG_SH_OUTMAP_TOTAL|GPUREG_SH_OUTMAP_TOTAL]] configures the number of used consecutive slots in the outmap.

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== Shaders ==

=== ~~Write output~~ components exactly once ===

=== Configued Output components must be written exactly once ===

Each configured output component has to be written exactly once or the PICA freezes.

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 === Vertex attribute alignment ===
-Vertex components which are defined through [[GPU/Internal_Registers#GPUREG_ATTRIBBUFFERi_CONFIG1|GPUREG_ATTRIBBUFFERi_CONFIG1]] will be aligned.
+Vertex components which are defined through [[GPU/Internal_Registers#GPUREG_ATTRIBBUFFERi_CONFIG1|GPUREG_ATTRIBBUFFERi_CONFIG1]] will be accessed aligned by the GPU.
 * Vertex attributes will be aligned to their component element size.
 * Padding attributes (Component type > 11) will always aligned to 4 byte offets into the buffer.
+* The stride which is passed to the GPU should be passed unaligned.
 === Vertex stride in GPUREG_ATTRIBBUFFERi_CONFIG2 ===
@@ Line 19: / Line 20: @@
 === Output mapping in GPUREG_SH_OUTMAP_MASK ===
-The output mapping in [[GPU/Internal_Registers#GPUREG_SH_OUTMAP_MASK|GPUREG_SH_OUTMAP_MASK]] configures how the registers starting at [[GPU/Internal_Registers#GPUREG_SH_OUTMAP_Oi|GPUREG_SH_OUTMAP_Oi]] will map the outputs in the shader.
+The output masking in [[GPU/Internal_Registers#GPUREG_SH_OUTMAP_MASK|GPUREG_SH_OUTMAP_MASK]] influences how the registers starting at [[GPU/Internal_Registers#GPUREG_SH_OUTMAP_Oi|GPUREG_SH_OUTMAP_Oi]] map to outputs in the shader.
 If an output is disabled in [[GPU/Internal_Registers#GPUREG_SH_OUTMAP_MASK|GPUREG_SH_OUTMAP_MASK]] it means that no slot in the [[GPU/Internal_Registers#GPUREG_SH_OUTMAP_Oi|GPUREG_SH_OUTMAP_Oi]] registers is consumed.
 [[GPU/Internal_Registers#GPUREG_SH_OUTMAP_TOTAL|GPUREG_SH_OUTMAP_TOTAL]] configures the number of used consecutive slots in the outmap.
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 == Shaders ==
-=== Write output components exactly once ===
+=== Configued Output components must be written exactly once ===
 Each configured output component has to be written exactly once or the PICA freezes.