Difference between revisions of "GSPGPU:ReadHWRegs"
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| − | | (Size<<14) <nowiki>|</nowiki> 2 | + | | {{IPC/TranslationDescriptor|(Size<<14) <nowiki>|</nowiki> 2}} |
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| − | | (Size<<14) <nowiki>|</nowiki> 2 | + | | {{IPC/TranslationDescriptor|(Size<<14) <nowiki>|</nowiki> 2}} |
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| 3 | | 3 | ||
Latest revision as of 23:24, 2 February 2016
Request[edit]
| Index Word | Description |
|---|---|
| 0 | Header code [0x00040080] |
| 1 | GPU address based at 0x1EB00000, must be word-aligned |
| 2 | Size, must be <=0x80 and word-aligned |
The following is located 0x100-bytes after the beginning of the above command buffer:
| Index Word | Description |
|---|---|
| 0 | Translation descriptor: (Size<<14) | 2 |
| 1 | Output buffer address |
Response[edit]
| Index Word | Description |
|---|---|
| 0 | Header code |
| 1 | Result code |
| 2 | Translation descriptor: (Size<<14) | 2 |
| 3 | Output data pointer |
Description[edit]
The GPU register offset must be <0x420000.