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→Trigger Command List Processing
=Commands=
=Commands=
==GX RequestDma==
== Trigger DMA Request ==
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|-
|-
|-
|-
| 7
| 7
| Flag: when source buffer is not located in VRAM and this flag is non-zero, svcFlushProcessDataCache is used with the source buffer.
| Flush source (0 = don't flush, 1 = flush)
|}
|}
This command is normally used to DMA data from the application GSP [[Memory_layout|heap]] to VRAM.
This command is normally used to DMA data from the application GSP [[Memory_layout|heap]] to VRAM. When flushing is enabled and the source buffer is not located within VRAM, svcFlushProcessDataCache is used to flush the source buffer.
==GX SetCommandList Last==
== Trigger Command List Processing ==
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|-
|-
|-
| 3
| 3
| Flag, bit0 is written to GSP module state
| Update gas additive blend results (0 = don't update, 1 = update)
|-
|-
| 6-4
| 6-4
|-
|-
| 7
| 7
| When non-zero, call svcFlushProcessDataCache() with the specified buffer
| Flush buffer (0 = don't flush, 1 = flush)
|}
|}
This command converts the specified address to a physical address, then writes the physical address and size to the [[GPU]] registers at 0x1EF018E0. This buffer contains [[GPU_Commands|GPU commands]].
This command converts the specified address to a physical address, then writes the physical address and size to the [[GPU]] registers at 0x1EF018E0. This buffer contains [[GPU/Internal_Registers|GPU commands]]. When flushing is enabled, svcFlushProcessDataCache is used to flush the buffer.
==GX SetMemoryFill==
== Trigger Memory Fill ==
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|-
|-
|-
|-
| 7
| 7
| The low u16 is width0, while the high u16 is width1 (?)
| Control0 <nowiki>|</nowiki> (Control1 << 16)
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|}
This commands converts the specified addresses to physical addresses, then writes these addresses and the specified parameters to the [[GPU]] registers at 0x1EF00010 and 0x1EF00020. Doing so fills the specified buffers with the associated 4-byte value. This is used to clear GPU framebuffers.
This command converts the specified addresses to physical addresses, then writes these addresses and the specified parameters to the [[GPU]] registers at 0x1EF00010 and 0x1EF00020. Doing so fills the specified buffers with the associated 4-byte value. This is used to clear GPU framebuffers.
The associated buffer address must not be <= to the main buffer address, thus the associated buffer address must not be zero as well. When the bufX address is zero, processing for the bufX parameters is skipped.
The associated buffer address must not be <= to the main buffer address, thus the associated buffer address must not be zero as well. When the bufX address is zero, processing for the bufX parameters is skipped.
==GX SetDisplayTransfer==
The values of Control0 and Control1 give information about the type of memory fill. See [[GPU/External_Registers#Memory Fill|here]] for more information about memory fill parameters.
== Trigger Display Transfer ==
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|-
Some color formats seem to require specific input / output sizes when performing a display transfer, doing an RGB5A1->RGBA4 display transfer would never fire the PPF interrupt with a 32x32 buffer, increasing the buffer to 128x128 made it fire correctly.
Some color formats seem to require specific input / output sizes when performing a display transfer, doing an RGB5A1->RGBA4 display transfer would never fire the PPF interrupt with a 32x32 buffer, increasing the buffer to 128x128 made it fire correctly.
==GX SetTextureCopy==
== Trigger Texture Copy ==
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|-
|-
|-
|-
| 1
| 1
| Input buffer address
| Input buffer address.
|-
|-
| 2
| 2
| Output buffer address
| Output buffer address.
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|-
| 3
| 3
| Size
| Total bytes to copy, not including gaps.
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|-
| 4
| 4
| Input [[GPU|dimensions]]?
| Bits 0-15: Size of input line, in bytes. Bits 16-31: Gap between input lines, in bytes.
|-
|-
| 5
| 5
| Output dimensions?
| Same as 4, but for the output.
|-
|-
| 6
| 6
| Flags, normally this is 0x8, with bit2 optionally set when either of the dimensions fields are set.
| Flags, corresponding to the [[GPU/External_Registers#Transfer_Engine|Transfer Engine flags]]. However, for TextureCopy commands, bit 3 is always set, bit 2 is set if any output dimension is smaller than the input, and other bits are always 0.
|-
|-
| 7
| 7
|}
|}
This command is similar to cmd3, this command also writes to the [[GPU]] registers at 0x1EF00C00.
This command is similar to cmd3. It also triggers the [[GPU/External_Registers#Transfer_Engine|GPU Transfer Engine]], but setting the TextureCopy parameters.
==GX SetCommandList First ==
== Flush Cache Regions ==
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|-