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Updated MCU pointer table register info
| 7
| 7
| Start/busy (0=Ready, 1=Start/busy)
| Start/busy (0=Ready, 1=Start/busy)
|}
== I2C_CNTEX ==
{| class="wikitable" border="1"
! BIT
! DESCRIPTION
|-
| 0-1
| ? Set to 2 normally.
|}
== I2C_SCL ==
{| class="wikitable" border="1"
! BIT
! DESCRIPTION
|-
| 0-5
| ?
|-
| 8-12
| ? Set to 5 normally.
|}
|}
| 0xa0
| 0xa0
| "i2c::EEP"
| "i2c::EEP"
| eeprom?
| HWCAL EEPROM ([[Hardware_calibration#Header|only present on dev units where SHA256 is used for HWCAL verification]])
|-
|-
| 15
| 15
== Device 3 ==
== Device 3 ==
ro = read-only (writing is no-op)
rw = read-write
wo = write-only (reading will yield 00, FF, or unpredictable data)
d* = dynamic register (explaination below this table)
s* = shared register (explaination below this table)
ds = dynamic shared (explaination below this table)
{| class="wikitable" border="1"
{| class="wikitable" border="1"
! REGISTER
! REGISTER
! WIDTH
! WIDTH
! INFO
! DESCRIPTION
! DESCRIPTION
|-
|-
| 0x00
| 0x00
| 1
| s
| ro
| Version high
| Version high
|-
|-
| 0x01
| 0x01
| 1
| s
| ro
| Version low
| Version low
|-
| 0x02
| d
| rw
| 2bit value, writing will mask away/"acknowledge" the event, set to 3 by mcuMainLoop on reset if reset source is Watchdog
bit0: RTC clock value got reset to defaults
bit1: Watchdog reset happened
|-
|-
| 0x03
| 0x03
| 8
| ds
| ?
| rw
| Top screen Vcom
|-
|-
| 0x04
| 0x04
| 8
| ds
| ?
| rw
| Bottom screen Vcom
|-
|-
| 0x05
| 0x05
| 0x4003?
- 0x07
| Danger zone - [[MCU_Services#MCU_firmware_versions|MCU firmware]] is uploaded here
| s
| rw
| Danger zone - [[MCU_Services#MCU_firmware_versions|MCU unlock sequence]] is written here.
|-
|-
| 0x08
| 0x08
| 1
| s
| 3D slider position 0x9..0xFB
| ro
| Raw 3D slider position
|-
|-
| 0x09
| 0x09
| 1
| s
| Sound volume: 0x0..0x3F.
| ro
| Volume slider state (0x00 - 0x3F)
This is the same value returned by [[MCUHWC:GetSoundVolume|MCUHWC:GetSoundVolume]]
|-
| 0x0A
| s
| ro
| ? (seems to be power management related?)
|-
| 0x0B
| s
| ro
| Battery percentage
|-
| 0x0C
| s
| ro
| ? (changes to 0 for a second when the charger is plugged in then it resets to its previous value)
|-
| 0x0D
| s
| ro
| System voltage
|-
|-
| 0xB
| 0x0E
| 1
| s
| Battery level: 0x0..0x40.
| ro
| ?
|-
|-
| 0xF
| 0x0F
| 1
| s
| Flags: bit7-5 are read via [[MCU_Services|mcu::GPU]]. The rest of these are read via [[MCU_Services|mcu::RTC]]: bit4 = BatteryChargeState. bit3 = AdapterState. bit1 = ShellState.
| ro
| Flags: bit7-5 are read via [[MCU_Services|mcu::GPU]]. The rest of them are read via [[MCU_Services|mcu::RTC]].
bit01: ShellState
bit03: AdapterState
bit04: BatteryChargeState
bit05: Bottom screen backlight on
bit06: Top screen backlight on
bit07: GPU on(?)
|-
|-
| 0x10
| 0x10
| 1
- 0x13
| Special HID status flags: bit0 = power button pressed, bit1 = power button pressed long, bit2 = home button pressed, bit3 = home button released, bit4 = wifi slider enabled, bit5 = shell got closed, bit6 = shell got opened. If nothing has changed this register is 0.
| s
| ro
| Received interrupt bitmask, see register 0x18 for possible values
If no interrupt was received this register is 0
|-
| 0x14
| s
| ro
| Unused and unwritable byte :(
|-
|-
| 0x12
| 0x15
| 1
- 0x17
| 0x40 if volume slider position changed
| s
| rw
| Unused and unreferenced free RAM! Good for userdata.
|-
|-
| 0x18
| 0x18
| 8
- 0x1B
| ?
| s
| rw
| Interrupt mask for register 0x10 (0=enabled,1=disabled)
bit00: Power button press (for 27 "ticks")
bit01: Power button held (for 375 "ticks"; the 3DS turns off regardless after a fixed time)
bit02: HOME button press (for 5 "ticks")
bit03: HOME button release
bit04: WiFi switch button
bit05: Shell close
bit06: Shell open
bit07: Fatal hardware condition([[Services#Notifications|?]]) (sent when the MCU gets reset by the Watchdog timer)
bit08: Charger removed
bit09: Charger plugged in
bit10: RTC alarm (when some conditions are met it's sent when the current day and month and year matches the current RTC time)
bit11: ??? (accelerometer related)
bit12: HID update
bit13: Battery percentage status change (triggered at 10%, 5%, and 0% while discharging)
bit14: Battery stopped charging (independent of charger state)
bit15: Battery started charging
Nonmaskable(?) interrupts
bit16: ???
bit17: ??? (opposite even for bit16)
bit22: Volume slider position change
bit23: ??? Register 0x0E update
bit24: ??? (the off event for below bit)
bit25: ??? (triggered when something related to the GPU is turned on, most likely backlight)
bit26: ??? (???)
bit27: ??? (???)
bit28: ??? (???)
bit29: ??? backlight on?
bit30: bit set by mcu sysmodule
bit31: bit set by mcu sysmodule
|-
| 0x1C
- 0x1F
| s
| rw
| Unused and unreferenced free RAM! Good for userdata.
|-
|-
| 0x20
| 0x20
| 8
| d
| Writing u8 value 4 here triggers a hardware system reboot. Writing u8 value 1 (repeatedly) triggers a shutdown via power-off?
| wo
| System power control:
bit0: power off
bit1: reboot (unused?)
bit2: reboot (used by mcu sysmodule and LgyBg)
bit3: used by LgyBg to power off, causes hangs in 3DS-mode
bit4: an mcu::RTC command uses this, seems to do something with the watchdog
Bit 4 sets a bit at a RAM address which seems to control the watcdog timer state, then this bit is immediately unmasked. This field has a bitmask of 0x0F.
|-
| 0x21
| d
| wo
| ??? switches up input bits from <code>0123456--</code> to <code>12-0435-</code> then writes them to REG[0x5D] (<code>0xFFC02</code>)
|-
|-
| 0x22
| 0x22
| 8
| d
| Used to set LCD states. bit0 = don't push to LCDs, bit1 = push to LCDs, bit2 = bottom screen backlight off, bit3 = bottom screen backlight on, bit4 = top screen backlight off, bit5 = top screen backlight on
| wo
| Used to set LCD states
bit0: don't push to LCDs
bit1: push to LCDs
bit2: bottom screen backlight off
bit3: bottom screen backlight on
bit4: top screen backlight off
bit5: top screen backlight on
Bits 4 and 5 have no effect on a 2DS because the backlight source is the bottom screen.
The rest of the bits are masked away.
|-
|-
| 0x23
| 0x23
| 8
| ??
| ?
| wo
| ??? Seems to be stubbed, just returns the written value from the write handler function.
|-
|-
| 0x24
| 0x24
| 8
| s
| rw
| Watchdog timer. This must be set *before* the timer is triggered, otherwise the old value is used. Value zero disables the watchdog.
| Watchdog timer. This must be set *before* the timer is triggered, otherwise the old value is used. Value zero disables the watchdog.
|-
| 0x25
| s
| rw
| ?
|-
| 0x26
| s
| rw
| ?
|-
| 0x27
| sd
| rw
| Raw volume slider state
|-
|-
| 0x28
| 0x28
| 8
| s
| ?
| rw
| Brightness of the WiFi/Power LED
|-
|-
| 0x29
| 0x29
| 8
| sd(5)
| ?
| ??
| Power mode indicator state (read-write)
1 = forced default blue
2 = sleep mode animation
3 = "power off" mode
4 = disable blue power LED and turn on red power LED
5 = disable red power LED and turn on blue power LED
6 = animate blue power LED off and flash red power LED
anything else = automatic mode
The other 4 bytes (32bits) affect the pattern of the red power LED (write only)
|-
|-
| 0x2A
| 0x2A
| 8
| s
| ?
| rw
| WiFi LED state, non-0 value turns on the WiFi LED, 4 bits wide
|-
|-
| 0x2B
| 0x2B
| 8
| s
| ?
| rw
| Camera LED state, 4bits wide,
0, 3, 6-0xF = off
1 = slowly blinking
2 = constantly on
3 = "TWL" mode
4 = flash once
5 = delay before changing to 2
|-
|-
| 0x2C
| 0x2C
| 8
| s
| setting bits 1, 3 and 4 turn on the 3D LED on the original 3ds
| rw
| 3D LED state, 4 bits wide
|-
|-
| 0x2D
| 0x2D
| 0x64
| 0x64
| This is used for [[MCURTC:SetInfoLEDPattern|controlling]] the notification LED(see [[MCURTC:SetInfoLEDPatternHeader]] as well), when this register is written.
| wo
| This is used for [[MCURTC:SetInfoLEDPattern|controlling]] the notification LED (see [[MCURTC:SetInfoLEDPatternHeader]] as well), when this register is written. It's possible to write data here with size less than 0x64, and only that portion of the pattern data will get overwritten. Reading from this register only returns zeroes, so it's considered write-only. Writing past the size of this register seems to do nothing.
|-
|-
| 0x2E
| 0x2E
| 1
| s
| This [[MCURTC:GetInfoLEDStatus|returns]] the notification LED status when read.
| ro
| This [[MCURTC:GetInfoLEDStatus|returns]] the notification LED status when read (1 means new cycle started)
|-
| 0x2F
| s
| wo?
| ??? The write function for this register is stubbed.
|-
|-
| 0x30
| 0x30
| 8
- 0x36
| RTC time (system clock)
| ds
| rw
| RTC time (system clock). 7 bytes are read from this. The upper nibble of each byte encodes 10s (BCD), so each byte is post-processed with (byte & 0xF) + (10 * (byte >> 4)).
byte 0: seconds
byte 1: minutes
byte 2: hours
byte 3: current week (unused)
byte 4: days
byte 5: months
byte 6: years
|-
| 0x37
| s
| rw
| RTC time byte 7: leap year counter / "watch error correction" register (unused in code)
|-
| 0x38
- 0x3C
| s
| rw
| RTC alarm registers
byte 0: minutes
byte 1: hours
byte 2: day
byte 3: month
byte 4: year
|-
|-
| 0x31
| 0x3B
| 8
| s
| ?
| rw
| Could be used on very old MCU_FIRM versions to upload [[MCU_Services#MCU_firmware_versions|MCU firmware]] if some conditions are met.
|-
|-
| 0x32
| 0x3D
| 8
0x3E
| ?
| ds
| ro
| RTC tick counter / "ITMC" (when resets to 0 the seconds increase)
Only reading 0x3D will update the in-RAM value
|-
|-
| 0x33
| 0x3F
| 8
| s
| ?
| wo
| 2 bits
bit0: turns off P00 and sets it to output mode (seems to kill the entire SoC)
bit1: turns on a prohibited bit in an RTC Control register and turns P12 into an output
|-
|-
| 0x34
| 0x40
| 8
| s
| ?
| rw
| Gyro sampling mode. Bits 0 and 1 control the gyro. If bits 0 or 1 are non-zero then gyro sampling is enabled.
|-
|-
| 0x35
| 0x41
| 8
| s
| ?
| rw
| Index selector for register 0x44
|-
|-
| 0x36
| 0x42
| 8
| s
| ?
| rw
| Unused?
|-
|-
| 0x37
| 0x43
| 8
| s
| ?
| rw
| Unused???, accelometer related
|-
|-
| 0x38
| 0x44
| 8
| s
| ?
| rw
| ???, pedoometer related(?)
|-
|-
| 0x39
| 0x45
| 8
- 0x4A
| ?
| s
| ro
| Gyroscope 3D rotation from the 12bit ADC, left shifted 4 to fit in a 16bit signed short
{| class="wikitable" border="1"
! AXIS
! V=0x00
! V=0x40
! V=0xC0
|-
|-
| 0x3A
| X (left/right)
| 8
| held vertically
| ?
| rotated or tilted left
| rotated or tilted right
|-
|-
| 0x3B
| Y (forwards/backwards)
| 8
| laid flat
| ?
| held up
| helf up upside-down
|-
|-
| 0x3C
| Z (???)
| 8
| ???
| ?
| ???
| ???
|}
|-
|-
| 0x41
| 0x4B
| 8
| s
| ?
| rw
| PedometerStepCount (for the current day)
|-
|-
| 0x43
| 0x4C
| 8
0x4D
| ?
| ??
| ??
| ??
|-
|-
| 0x4E
| 0x4E
| 8
| d
| ?
| rw
| ??? this = (0xFFE9E & 1) ? 0x10 : 0
|-
| 0x4F
| d(6)
| ro
|
|-
|-
| 0x50
| 0x50
| 8
| s
| ?
| rw
| ???
|-
|-
| 0x51
| 0x51
| 8
| s
| rw
| ???
|-
| 0x52
- 0x57
| s
| rw
| ?
| ?
|-
|-
| 0x58
| 0x58
| 8
| s
| ?
| rw
| Register-mapped ADC register
DSP volume slider 0% volume offset (setting this to 0xFF will esentially mute the DSP as it's the volume slider's maximum raw value)
|-
| 0x59
| s
| rw
| Register-mapped ADC register
DSP volume slider 100% volume offset (setting both this and the above to 0 will disable the volume slider with 100% volume, setting this to a lower value than the above will make the volume slider have only 2 states; on and off)
|-
| 0x5A
| s
| ro/rw
| Invalid, do not use! On newer MCU_FIRM versions this is unused, but on older MCU_FIRM versions this is a read-only counter.
|-
| 0x5B
- 0x5F
| s
| -
| These registers are out of bounds (0xFFC00 and up), they don't exist, writing is no-op, reading will yield FFs.
|-
|-
| 0x60
| 0x60
| 8
| ds
| Offset in u8 array accessed via address 0x61 (written before any read/write below)
| rw
| Looping queue register
Writing to first byte resets the queue position to the nth element
Reading from this register causes the values to shift up by `readsize-1`(needs confirmation) bytes after returning `readsize-1` bytes from the top of the stack (first byte is read-only, so is always zero)
|-
|-
| 0x61
| 0x61
| 0x100
| ds(0x100)
| Reads/writes to an MCU u8 array, repeats after 0x100 bytes? The use of this register seems to be arbitrary. The first byte is used to store flags for managing FIRM/NS state - bit1 = "LegacyPoweroff", bit4 = "LegacyJumpProhibited". bit2 causes the MCU driver (in mcu-module or LgyBg) to power off the system until next cold-boot. This register survives power-off, but does not seem to be saved to non-volatile storage (does not survive battery pulls).
| rw
| Writing to this register pushes values on top of register 0x60's stack. Reading from this register doesn't advance the stack.
The first byte is used to store flags for managing FIRM/NS state - bit0 = "WirelessDisabled", bit1 = "SoftwareClosed", bit2 = "PowerOffInitiated", bit4 = "LegacyJumpProhibited". This register survives a power-off, but it resides in RAM, so its contents get lost on battery pulls. This register doesn't seem to actually control MCU behaviour by itself, it just seems to be used for storing arbitrary data.
|-
| 0x62 - 0x7E
| s
| -
| These registers don't exist, writing is no-op, reading will yield FFs.
|-
| 0x7F
| d(9-0x13)
| ro
| Various system state information (debug pointer table)
byte 0x06: battery related? (seems to decrease while charging and increase while discharging)
byte 0x09: system model (see [[Cfg:GetSystemModel#System_Model_Values|Cfg:GetSystemModel]] for values)
byte 0x0A: Red Power LED mode (0 = off, 1 = on)
byte 0x0B: Blue Power LED intensity (0x00 - 0xFF)
byte 0x0D: RGB LED red intensity
byte 0x0E: RGB LED green intensity
byte 0x0F: RGB LED blue intensity
byte 0x11: WiFi LED brightness
byte 0x12: raw button states?
bit0: unset while Power button is held
bit1: unset while HOME button is held
bit2: unset while WiFi slider is held
bit5: unset while the charging LED is active
bit6: unset while charger is plugged in
On MCU_FIRM major version 1 the size of this is 9, reading past the 9th byte will yield AA instead of FF.
|-
| 0x80
- 0xFF
| s
| -
| These registers don't exist, writing is no-op, reading will yield FFs.
|}
|}
Shared register: the letter "s" means that the given register is in a "shared register pool", meaning the resgister is in the register pool in RAM at address <code>0xFFBA4 + registernumber</code>.
Dynamic register: these registers aren't in the shared pool, they just "pretend" to be there. These registers often don't retain their set value, change rapidly, or control various hardware.
Non-shared (dynamic) register: it's a register whose contents separate from the shared register pool. Messing with these registers will not affect the shared register pool at all.
On old versions of MCU_FIRM none of the invalid registers are masked away by the read handler function, but are still read-only. Newer MCU_FIRM versions return the hardcoded value FF instead.
== Device 5 & 6 ==
== Device 5 & 6 ==
See the [http://www.alldatasheet.net/datasheet-pdf/pdf/347838/NXP/SC16IS750IBS.html datasheet] linked to on the [[Hardware]] page for reference. From that datasheet, for the structure of the I2C register address u8: "Bit 0 is not used, bits 2:1 select the channel, bits 6:3 select one of the UART internal registers. Bit 7 is not used with the I2C-bus interface, but it is used by the SPI interface to indicate a read or a write operation."
See the [http://www.alldatasheet.net/datasheet-pdf/pdf/347838/NXP/SC16IS750IBS.html datasheet] linked to on the [[Hardware]] page for reference. From that datasheet, for the structure of the I2C register address u8: "Bit 0 is not used, bits 2:1 select the channel, bits 6:3 select one of the UART internal registers. Bit 7 is not used with the I2C-bus interface, but it is used by the SPI interface to indicate a read or a write operation."
== Device 14 ==
Used by [[Config_Services|Cfg]]-sysmodule via the i2c::EEP service. This is presumably EEPROM going by the service name.
The Cfg-module code which loads the [[Flash_Filesystem|CCAL]](nandro:/sys/{HWCAL0.dat/HWCAL1.dat}) file from NAND will load it from I2C instead, if a certain state flag is non-zero. Likewise for the function which writes CCAL to NAND. HMAC/hash verification after loading is skipped when the CCAL was loaded from I2C.
== Device 15 ==
== Device 15 ==