KThreadContext

Revision as of 20:46, 28 August 2016 by Bond697 (talk | contribs)


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Offset Type Description
0xF50 u32[10] SVC mode registers, r4-r11, r13, r14
0xFF8 u32 FPEXC, floating point exception register for thread- stored and loaded on context switches

When switching thread contexts the kernel does, in order:

  • Load FPEXC
  • Save the LR to r1- this LR is the return back to the main scheduling and context switching function
  • Load r4-r11, SP, LR
  • Branch back to r1, preserving the LR which was just reloaded, back to the main scheduling function, but in the context of the newly switched-to thread