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mLine 48:
Line 48: − |- − | style="background: green" | Yes − | [[#PDN_WIFIUNK|PDN_WIFI_UNK]] − | 0x1014110C − | 1 − | [[NWM Services]] Line 111:
Line 105: − + Line 387:
Line 381: − + − + − + + + − + + + Line 465:
Line 463: − +
→Registers
| 2
| 2
| TwlBg
| TwlBg
|-
|-
| style="background: green" | Yes
| style="background: green" | Yes
|-
|-
| style="background: green" | Yes
| style="background: green" | Yes
| PDN_FCRAM_CNT
| [[#PDN_FCRAM_CNT|PDN_FCRAM_CNT]]
| 0x10141210
| 0x10141210
| 2
| 2
| SoC mode.
| SoC mode.
Possible values:
Possible values:
0=O3DS (2 cores, 256MHz)
0=CTR+256MHz
1=N3DS (LGR2?, 4 cores, 256MHz), 5=N3DS (LGR2?, 4 cores, 804MHz)
1=LGR2+256MHz, 5=LGR2+804MHz
2=N3DS prototype (LGR, 2 cores, 256MHz), 3=N3DS prototype (LGR, 2 cores, 536MHz)
2=LGR+256MHz, 3=LGR+536MHz
N3DS modes (LGR1/LGR2) enable the New 3DS FCRAM extension and are needed to access N3DS-only devices.
N3DS modes enable the New 3DS FCRAM extension and are needed to access N3DS-only devices.
* CTR: O3DSS
* LGR1: N3DS prototype, 2 cores, no L2C
* LGR2: retail N3DS, 4 cores, has L2C
|-
|-
| 15
| 15
|-
|-
| 8
| 8
| Enables the L2C block
| Enables the L2C block (LGR2 only)
|}
|}