Changes

1,808 bytes added ,  07:35, 24 September 2021
[WIP] Update MCU info + reformat table + merge TP numbers from page history
Line 114: Line 114:  
== UC CTR ==
 
== UC CTR ==
   −
This MCU seems to be a customized 64 pin FLGA version of this: https://www.renesas.com/ko-kr/doc/products/mpumcu/doc/rl78/r01ds0053ej0330-rl78g14.pdf
+
The MCU seems to most closely resemble an NEC (Renesas) 78K0R/Kx3-L 64-pin FBGA: https://www.renesas.com/us/en/document/mah/78k0rkx3-l-users-manual-hardware-r01uh0106ej040078k0rkx3l?language=en&r=1051991
   −
The pin layouts are similar, but not the same
+
The functional pin mapping is almost exactly the same, except the GPIO port assignment is almost completely different.
 +
 
 +
Most low port numbers appear to map to the correct physical pin locations as described in the above datasheet, however around P7 and above this mapping is definitely altered.
    
Orientation: Pin 1 marker in bottom left corner
 
Orientation: Pin 1 marker in bottom left corner
   −
===Hardware pins===
+
===Pinout===
    
{| class="wikitable" style="font-family:Monospace;text-align:center;width:100%;table-layout:fixed;width:26%;"
 
{| class="wikitable" style="font-family:Monospace;text-align:center;width:100%;table-layout:fixed;width:26%;"
 +
|-
 +
|style="background: #eaecf0" | 8
 
| style="background: #d9ffb3" | + || style="background: #bbbbbb" | G || || || TP75 || style="background: #ffaaaa" | X || style="background: #ffaaaa" | X || style="background: #4d4d33" | ?  
 
| style="background: #d9ffb3" | + || style="background: #bbbbbb" | G || || || TP75 || style="background: #ffaaaa" | X || style="background: #ffaaaa" | X || style="background: #4d4d33" | ?  
 
|-
 
|-
 +
|style="background: #eaecf0" | 7
 
| style="background: #73e600" | SCL || || style="background: #bbbbbb" | G || || /RESET || style="background: #4d4d33" | ? || style="background: #4d4d33" | ? || style="background: #d9ffb3" | +  
 
| style="background: #73e600" | SCL || || style="background: #bbbbbb" | G || || /RESET || style="background: #4d4d33" | ? || style="background: #4d4d33" | ? || style="background: #d9ffb3" | +  
 
|-
 
|-
 +
|style="background: #eaecf0" | 6
 
| style="background: #73e600" | SDA || || style="background: #d9ffb3" | + || TP77 || TP76 || || || style="background: #d9ffb3" | +  
 
| style="background: #73e600" | SDA || || style="background: #d9ffb3" | + || TP77 || TP76 || || || style="background: #d9ffb3" | +  
 
|-
 
|-
 +
|style="background: #eaecf0" | 5
 
| style="background: #4d4d33" | ? || || TP78 || PWRLED1 || || || || CHRGLED
 
| style="background: #4d4d33" | ? || || TP78 || PWRLED1 || || || || CHRGLED
 
|-
 
|-
 +
|style="background: #eaecf0" | 4
 
| || || || || || || style="background: #bbbbbb" | G || style="background: #bbbbbb" | G  
 
| || || || || || || style="background: #bbbbbb" | G || style="background: #bbbbbb" | G  
 
|-
 
|-
 +
|style="background: #eaecf0" | 3
 
| || PWRBTN || || || || || BATTTHM ||
 
| || PWRBTN || || || || || BATTTHM ||
 
|-
 
|-
 +
|style="background: #eaecf0" | 2
 
| || || || PWRLED0 || || || HOMEBTN ||
 
| || || || PWRLED0 || || || HOMEBTN ||
 
|-
 
|-
 +
|style="background: #eaecf0" | 1
 
| style="background: #d9ffb3" | + || || || || style="background: #8efab4" | SCL || style="background: #8efab4" | SDA || || style="background: #bbbbbb" | G  
 
| style="background: #d9ffb3" | + || || || || style="background: #8efab4" | SCL || style="background: #8efab4" | SDA || || style="background: #bbbbbb" | G  
 +
|-
 +
!/
 +
!A
 +
!B
 +
!C
 +
!D
 +
!E
 +
!F
 +
!G
 +
!H
 
|}
 
|}
   −
===Software pins===
+
===Pin assignment===
 +
 
 +
und = undocumented / custom
 +
SFR = Special Function Register (SFR bank 1, range FFF00h - FFFFFh)
 +
ESR = Extended Special Function Register (SFR bank 2, range F0000h - F0806h)
 +
/  = active low (ground to enable, pull to power supply to disable)
    
{| class="wikitable" border="1"
 
{| class="wikitable" border="1"
Port ID
+
TP
!  Pin ID
+
!  Pin
 +
!  Port
 
!  Purpose
 
!  Purpose
 
|-
 
|-
| 020
+
| TP79
| ??
+
| A8
 +
| EVdd
 +
| Digital voltage source input (positive)
 +
|-
 +
| TP74
 +
| E7
 +
| /RESET
 +
| Resets the MCU when grounded, but is also used when reprogramming
 +
|-
 +
| TP75
 +
| E8
 +
| FLMD0
 +
| Flash mode(?) used when reprogramming with external programmer
 +
|-
 +
| TP76
 +
| E6
 +
| TOOL1
 +
| Used when using an ICE or debugger
 +
|-
 +
| TP77
 +
| D6
 +
| TOOL0
 +
| Multipurpose pin for reprogramming and debugging
 +
|-
 +
|
 +
| A7
 +
| SCL0 / P6.0
 +
| DSi-side I2C SCL
 +
|-
 +
|
 +
| A6
 +
| SDA0 / P6.1
 +
| DSi-side I2C SDA
 +
|-
 +
|
 +
| E1
 +
| SCL1 / ESR[510h].und
 +
| 3DS-side SCL
 +
|-
 +
|
 +
| F1
 +
| SDA1 / ESR[510h].und
 +
| 3DS-side SDA
 +
|-
 +
|
 +
| F7
 +
| /P0.1
 +
| SocReset_n (one of the two SoC reset signals)
 +
|-
 +
|
 +
| G7
 +
| /P0.0
 +
| SocReset_n (one of the two SoC reset signals)
 +
|-
 +
|
 +
|
 +
| /P3.0
 +
| Unknown. Probably resets something, as it's poked in a similar pattern to the SoC reset signals.
 +
|-
 +
|
 +
|
 +
| P5.0
 +
| Toggles something (poked in conjunction with reset signals)
 +
|-
 +
|
 +
|
 +
| P2.0
 
| HOME button
 
| HOME button
 
|-
 
|-
| 043
+
|  
| ??
+
|  
 +
| P4.3
 
| Charging LED(?)
 
| Charging LED(?)
 
|-
 
|-
| 051
+
|  
| ??
+
|  
 +
| P5.1
 
| Charger "button"
 
| Charger "button"
 
|-
 
|-
| 073
+
|  
| ??
+
|  
 +
| P7.0
 +
| ???
 +
|-
 +
|
 +
|
 +
| P2.4
 +
| BatteryChargeState (?)
 +
|-
 +
|
 +
|
 +
| P7.3
 
| Power button
 
| Power button
 
|-
 
|-
| 074
+
|  
| ??
+
|  
 +
| P7.4
 
| WiFi button
 
| WiFi button
 
|-
 
|-
| 076
+
|  
| ??
+
|  
 +
| P7.6
 
| External IRQ (MCU --> SoC)
 
| External IRQ (MCU --> SoC)
 
|}
 
|}
215

edits