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1,563 bytes added ,  05:12, 5 December 2015
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| 0x0E4
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This register is used to configure the fragment operation mode and whether to use logic ops or blending.
Fragment operation mode values:
| unsigned, Alpha destination function
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This register is used to configure the blending function.
Equation values:
| unsigned, Logic op
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This register is used to configure the logic op.
Logic op values:
| unsigned, Alpha
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This register is used to configure the blending color.
=== GPUREG_FRAGOP_ALPHA_TEST ===
| unsigned, Reference value
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This register is used to configure alpha testing.
Function values:
| unsigned, Mask
|}
 
This register is used to configure stencil testing.
Function values:
| unsigned, Z-pass operation
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This register is used to configure stencil result operations.
Operation values:
| unsigned, Depth write enabled (0 = disabled, 1 = enabled)
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This register is used to depth testing and framebuffer write masking.
Depth function values:
| unsigned, Allow read (0 = disable, 0xF = enable)
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This register configures read access from the color buffer.
=== GPUREG_COLORBUFFER_WRITE ===
| unsigned, Allow write (0 = disable, 0xF = enable)
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This register configures write access to the color buffer.
=== GPUREG_DEPTHBUFFER_READ ===
| unsigned, Allow depth read (0 = disable, 1 = enable)
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This register configures read access from the depth and stencil buffers.
=== GPUREG_DEPTHBUFFER_WRITE ===
| unsigned, Allow depth write (0 = disable, 1 = enable)
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This register configures write access to the depth and stencil buffers.
=== GPUREG_DEPTHBUFFER_FORMAT ===
| unsigned, Format
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This register configures the depth buffer data format.
Format values:
| unsigned, Format
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This register configures the color buffer data format. Color components are laid out in reverse byte order in memory, with the most significant bits used first.
Pixel size values:
| RGBA4
|}
Color components are laid out in reverse byte order in memory, with the most significant bits used first.
=== GPUREG_EARLYDEPTH_TEST2 ===
| unsigned, Enabled (0 = disabled, 1 = enabled)
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This register enables the early depth test.
=== GPUREG_FRAMEBUFFER_BLOCK32 ===
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This register configures the framebuffer block mode. To untile the color buffer when using the 32x32 block format, use bit 16 of the [[GPU/External_Registers#Transfer_Engine|display transfer flags]]. It is unknown if there are any advantages to using the 32x32 format.
Render block mode values:
| unsigned, Depth buffer physical address >> 3
|}
 
This register configures the depth buffer physical address.
=== GPUREG_COLORBUFFER_LOC ===
| unsigned, Color buffer physical address >> 3
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This register configures the color buffer physical address.
=== GPUREG_FRAMEBUFFER_DIM ===
| 0x1
|}
 
This register configures the framebuffer dimensions.
=== GPUREG_GAS_LIGHT_XY ===
| unsigned, Planar shading density attenuation
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This register configures gas light planar shading.
=== GPUREG_GAS_LIGHT_Z ===
| unsigned, View shading density attenuation
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This register configures gas light view shading.
=== GPUREG_GAS_LIGHT_Z_COLOR ===
| unsigned, View shading effect in line-of-sight direction
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This register configures gas light shading in the line-of-sight direction.
=== GPUREG_GAS_LUT_INDEX ===
| unsigned, Index
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This register is used to set what index to write to with GPUREG_GAS_LUT_DATA''i''.
=== GPUREG_GAS_LUT_DATA ===
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These registers behave as a FIFO queue. Each write to these registers writes the provided value to the gas look-up table, starting at the index selected with GPUREG_GAAS_LUT_INDEXGPUREG_GAS_LUT_INDEX.
==== Gas Look-Up Table ====
| fixed0.16.8, Depth direction attenuation proportion
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This register is used to configure the gas depth direction attenuation proportion.
=== GPUREG_FRAGOP_SHADOW ===
| float1.5.10, Penumbra scale with reversed sign
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This register is used to configure shadow properties.
== Fragment lighting registers ==
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