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102 bytes added ,  01:12, 17 January 2017
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| || || . || || style="background: #bbbbbb" | G || . || . || style="background: #007f00" | 1v2 || style="background: #bbbbbb" | G || . || . || . || . || . || . || . || . || . || . || . || . || style="background: #00cf00" | 1v8 || style="background: #bbbbbb" | G || . || . || style="background: #bbbbbb" | G || || . || ||
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| style="background: #33ffff" | SCL || || . || || style="background: #00ff00" | 3v3 || . || . || style="background: #bbbbbb" | G || style="background: #00ff00" | 3v3 || . || . || . || . || . || . || . || . || . || . || . || . || style="background: #bbbbbb" | G || style="background: #007f00" | 1v2 || . || . || style="background: #007f00" | 1v2 || || . || ||
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| style="background: #33ffff" | SDA || || . || || style="background: #007f00" | 1v2 || . || . || style="background: #00ff00" | 3v3 || style="background: #bbbbbb" | G || . || . || . || . || . || . || . || . || . || . || . || . || style="background: #00cf00" | 1v8 || style="background: #bbbbbb" | G || . || . || style="background: #00cf00" | 1v8 || || . || ||
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| || || . || || style="background: #bbbbbb" | G || . || . || style="background: #bbbbbb" | G || style="background: #007f00" | 1v2 || . || . || . || . || . || . || . || . || . || . || . || . || style="background: #bbbbbb" | G || style="background: #00cf00" | 1v8 || . || . || style="background: #bbbbbb" | G || || . || ||
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| style="background: #0000ff" | NAND
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| style="background: #33ffff" | I2C-3
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| style="background: #007f00" | 1.2v rail

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