Corelink DMA Engines: Difference between revisions
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sint8_t channel_sel; // @0 Selects which DMA channel to use: 0-7, -1 = don't care. | sint8_t channel_sel; // @0 Selects which DMA channel to use: 0-7, -1 = don't care. | ||
uint8_t endian_swap_size; // @1 Accepted values: 0=none, 2=16bit, 4=32bit, 8=64bit. | uint8_t endian_swap_size; // @1 Accepted values: 0=none, 2=16bit, 4=32bit, 8=64bit. | ||
uint8_t flags; // @2 bit0: DST_CFG, bit1: SRC_CFG, bit2: SHALL_BLOCK, bit3: | uint8_t flags; // @2 bit0: DST_CFG, bit1: SRC_CFG, bit2: SHALL_BLOCK, bit3: KEEP_ALIVE, bit6: DST_ALT_CFG, bit7: SRC_ALT_CFG | ||
uint8_t padding; | uint8_t padding; | ||
DmaSubConfig dst_cfg; | DmaSubConfig dst_cfg; | ||
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struct DmaSubConfig { | struct DmaSubConfig { | ||
sint8_t peripheral_id; // @0 If not *_ALT_CFG set, this must be < 0x1E. | sint8_t peripheral_id; // @0 If not *_ALT_CFG set, this must be < 0x1E. | ||
uint8_t | uint8_t burst_size_raw; // (1 << raw size) bytes, bit4 is ignored? // @1 Accepted values: 4=fixed_addr??, 8=increment_addr??, 12=lgy_fb_copy?, 15=userspace_copy? (??) | ||
sint16_t | sint16_t max_burst_size_bits; // @2 Must be 0 or multiple of 4? | ||
sint16_t transfer_size?; // @4 Must not be 0 if peripheral_id == 0xFF. | sint16_t transfer_size?; // @4 Must not be 0 if peripheral_id == 0xFF. | ||
sint16_t unk4; // @6 | sint16_t unk4; // @6 | ||