ARM11 Interrupts: Difference between revisions

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@@ Line 216: / Line 216: @@
 | 0x58
 | Kernel
-| PDN Wake Event
+| PDN (wake event or SoC mode changed)
 |-
 | 0x59
@@ Line 256: / Line 256: @@
 | 0x66
 | gpio, TwlBg
-| GPIO_DATA1.bit1 (sfio = ?)
+| GPIO2_1
 |-
 | 0x68
@@ Line 272: / Line 272: @@
 | 0x6B
 | gpio, TwlBg
-| GPIO_DATA3.bit3 (sfio = ?)
+| GPIO3_3
 |-
 | 0x6C
 | gpio, TwlBg
-| GPIO_DATA3.bit4 (sfio = ?)
+| GPIO3_4
 |-
 | 0x6D
 | gpio, TwlBg
-| GPIO_DATA3.bit5 (sfio = ?)
+| GPIO3_5
 |-
 | 0x6E
 | gpio, TwlBg
-| GPIO_DATA3.bit6 (sfio = ?)
+| GPIO3_6
 |-
 | 0x6F
 | gpio, TwlBg
-| GPIO_DATA3.bit7 (sfio = ?)
+| GPIO3_7
 |-
 | 0x70
 | gpio, TwlBg
-| GPIO_DATA3.bit8 (sfio = ?)
+| GPIO3_8
 |-
 | 0x71
@@ Line 304: / Line 304: @@
 | 0x73
 | TwlBg
-| GPIO_DATA3.bit11 (sfio = ?)
+| GPIO3_11
 |-
 | 0x74
@@ Line 330: / Line 330: @@
-There are 2 tables in the ARM11 kernel: the first has 32 * 2(or 32 * 4) 8-byte entries. This table is for the private interrupts that belong to each core.  The data for each interrupt can be found by doing table_base + (core_num * 0x100) + (intr_num * 8).  The second table is for public hardware interrupts and the data for each interrupt can be retrieved by doing table_base + (intr_num * 8).
+There are 2 tables in the Arm11 kernel: the first has 32 * 2(or 32 * 4) 8-byte entries. This table is for the private interrupts that belong to each core.  The data for each interrupt can be found by doing table_base + (core_num * 0x100) + (intr_num * 8).  The second table is for public hardware interrupts and the data for each interrupt can be retrieved by doing table_base + (intr_num * 8).
-The Arm11 kernel configures interrupts the following way:
+The Arm11 kernel configures interrupts the following way (it seems the GPIO IRQ layout doesn't match released 3DS models):
   <nowiki>Interrupts 0x00 to 0x1F: edge-triggered, N-N